1*4882a593Smuzhiyun/dts-v1/; 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun#include <dt-bindings/gpio/x86-gpio.h> 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun/include/ "skeleton.dtsi" 6*4882a593Smuzhiyun/include/ "keyboard.dtsi" 7*4882a593Smuzhiyun/include/ "serial.dtsi" 8*4882a593Smuzhiyun/include/ "rtc.dtsi" 9*4882a593Smuzhiyun/include/ "tsc_timer.dtsi" 10*4882a593Smuzhiyun/include/ "coreboot_fb.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Google Link"; 14*4882a593Smuzhiyun compatible = "google,link", "intel,celeron-ivybridge"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun aliases { 17*4882a593Smuzhiyun spi0 = &spi; 18*4882a593Smuzhiyun usb0 = &usb_0; 19*4882a593Smuzhiyun usb1 = &usb_1; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun config { 23*4882a593Smuzhiyun silent_console = <0>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun cpus { 27*4882a593Smuzhiyun #address-cells = <1>; 28*4882a593Smuzhiyun #size-cells = <0>; 29*4882a593Smuzhiyun u-boot,dm-pre-reloc; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun cpu@0 { 32*4882a593Smuzhiyun device_type = "cpu"; 33*4882a593Smuzhiyun compatible = "intel,core-gen3"; 34*4882a593Smuzhiyun reg = <0>; 35*4882a593Smuzhiyun intel,apic-id = <0>; 36*4882a593Smuzhiyun u-boot,dm-pre-reloc; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun cpu@1 { 40*4882a593Smuzhiyun device_type = "cpu"; 41*4882a593Smuzhiyun compatible = "intel,core-gen3"; 42*4882a593Smuzhiyun reg = <1>; 43*4882a593Smuzhiyun intel,apic-id = <1>; 44*4882a593Smuzhiyun u-boot,dm-pre-reloc; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun cpu@2 { 48*4882a593Smuzhiyun device_type = "cpu"; 49*4882a593Smuzhiyun compatible = "intel,core-gen3"; 50*4882a593Smuzhiyun reg = <2>; 51*4882a593Smuzhiyun intel,apic-id = <2>; 52*4882a593Smuzhiyun u-boot,dm-pre-reloc; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun cpu@3 { 56*4882a593Smuzhiyun device_type = "cpu"; 57*4882a593Smuzhiyun compatible = "intel,core-gen3"; 58*4882a593Smuzhiyun reg = <3>; 59*4882a593Smuzhiyun intel,apic-id = <3>; 60*4882a593Smuzhiyun u-boot,dm-pre-reloc; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun chosen { 66*4882a593Smuzhiyun stdout-path = "/serial"; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun keyboard { 70*4882a593Smuzhiyun intel,duplicate-por; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun pch_pinctrl { 74*4882a593Smuzhiyun compatible = "intel,x86-pinctrl"; 75*4882a593Smuzhiyun u-boot,dm-pre-reloc; 76*4882a593Smuzhiyun reg = <0 0>; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun gpio_a0 { 79*4882a593Smuzhiyun gpio-offset = <0 0>; 80*4882a593Smuzhiyun mode-gpio; 81*4882a593Smuzhiyun direction = <PIN_INPUT>; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun gpio_a1 { 85*4882a593Smuzhiyun gpio-offset = <0>; 86*4882a593Smuzhiyun mode-gpio; 87*4882a593Smuzhiyun direction = <PIN_OUTPUT>; 88*4882a593Smuzhiyun output-value = <1>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun gpio_a3 { 92*4882a593Smuzhiyun gpio-offset = <0 3>; 93*4882a593Smuzhiyun mode-gpio; 94*4882a593Smuzhiyun direction = <PIN_INPUT>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun gpio_a5 { 98*4882a593Smuzhiyun gpio-offset = <0 5>; 99*4882a593Smuzhiyun mode-gpio; 100*4882a593Smuzhiyun direction = <PIN_INPUT>; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun gpio_a6 { 104*4882a593Smuzhiyun gpio-offset = <0 6>; 105*4882a593Smuzhiyun mode-gpio; 106*4882a593Smuzhiyun direction = <PIN_OUTPUT>; 107*4882a593Smuzhiyun output-value = <1>; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun gpio_a7 { 111*4882a593Smuzhiyun gpio-offset = <0 7>; 112*4882a593Smuzhiyun mode-gpio; 113*4882a593Smuzhiyun direction = <PIN_INPUT>; 114*4882a593Smuzhiyun invert; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun gpio_a8 { 118*4882a593Smuzhiyun gpio-offset = <0 8>; 119*4882a593Smuzhiyun mode-gpio; 120*4882a593Smuzhiyun direction = <PIN_INPUT>; 121*4882a593Smuzhiyun invert; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun gpio_a9 { 125*4882a593Smuzhiyun gpio-offset = <0 9>; 126*4882a593Smuzhiyun mode-gpio; 127*4882a593Smuzhiyun direction = <PIN_INPUT>; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun gpio_a10 { 131*4882a593Smuzhiyun u-boot,dm-pre-reloc; 132*4882a593Smuzhiyun gpio-offset = <0 10>; 133*4882a593Smuzhiyun mode-gpio; 134*4882a593Smuzhiyun direction = <PIN_INPUT>; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun gpio_a11 { 138*4882a593Smuzhiyun gpio-offset = <0 11>; 139*4882a593Smuzhiyun mode-gpio; 140*4882a593Smuzhiyun direction = <PIN_INPUT>; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun gpio_a12 { 144*4882a593Smuzhiyun gpio-offset = <0 12>; 145*4882a593Smuzhiyun mode-gpio; 146*4882a593Smuzhiyun direction = <PIN_INPUT>; 147*4882a593Smuzhiyun invert; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun gpio_a14 { 151*4882a593Smuzhiyun gpio-offset = <0 14>; 152*4882a593Smuzhiyun mode-gpio; 153*4882a593Smuzhiyun direction = <PIN_INPUT>; 154*4882a593Smuzhiyun invert; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun gpio_a15 { 158*4882a593Smuzhiyun gpio-offset = <0 15>; 159*4882a593Smuzhiyun mode-gpio; 160*4882a593Smuzhiyun direction = <PIN_INPUT>; 161*4882a593Smuzhiyun invert; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun gpio_a21 { 165*4882a593Smuzhiyun gpio-offset = <0 21>; 166*4882a593Smuzhiyun mode-gpio; 167*4882a593Smuzhiyun direction = <PIN_INPUT>; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun gpio_a24 { 171*4882a593Smuzhiyun gpio-offset = <0 24>; 172*4882a593Smuzhiyun mode-gpio; 173*4882a593Smuzhiyun output-value = <0>; 174*4882a593Smuzhiyun direction = <PIN_OUTPUT>; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun gpio_a28 { 178*4882a593Smuzhiyun gpio-offset = <0 28>; 179*4882a593Smuzhiyun mode-gpio; 180*4882a593Smuzhiyun direction = <PIN_INPUT>; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun gpio_b4 { 184*4882a593Smuzhiyun gpio-offset = <0x30 4>; 185*4882a593Smuzhiyun mode-gpio; 186*4882a593Smuzhiyun direction = <PIN_OUTPUT>; 187*4882a593Smuzhiyun output-value = <1>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun gpio_b9 { 191*4882a593Smuzhiyun u-boot,dm-pre-reloc; 192*4882a593Smuzhiyun gpio-offset = <0x30 9>; 193*4882a593Smuzhiyun mode-gpio; 194*4882a593Smuzhiyun direction = <PIN_INPUT>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun gpio_b10 { 198*4882a593Smuzhiyun u-boot,dm-pre-reloc; 199*4882a593Smuzhiyun gpio-offset = <0x30 10>; 200*4882a593Smuzhiyun mode-gpio; 201*4882a593Smuzhiyun direction = <PIN_INPUT>; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun gpio_b11 { 205*4882a593Smuzhiyun u-boot,dm-pre-reloc; 206*4882a593Smuzhiyun gpio-offset = <0x30 11>; 207*4882a593Smuzhiyun mode-gpio; 208*4882a593Smuzhiyun direction = <PIN_INPUT>; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun gpio_b25 { 212*4882a593Smuzhiyun gpio-offset = <0x30 25>; 213*4882a593Smuzhiyun mode-gpio; 214*4882a593Smuzhiyun direction = <PIN_INPUT>; 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun gpio_b28 { 218*4882a593Smuzhiyun gpio-offset = <0x30 28>; 219*4882a593Smuzhiyun mode-gpio; 220*4882a593Smuzhiyun direction = <PIN_OUTPUT>; 221*4882a593Smuzhiyun output-value = <1>; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun pci { 227*4882a593Smuzhiyun compatible = "pci-x86"; 228*4882a593Smuzhiyun #address-cells = <3>; 229*4882a593Smuzhiyun #size-cells = <2>; 230*4882a593Smuzhiyun u-boot,dm-pre-reloc; 231*4882a593Smuzhiyun ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 232*4882a593Smuzhiyun 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 233*4882a593Smuzhiyun 0x01000000 0x0 0x1000 0x1000 0 0xefff>; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun northbridge@0,0 { 236*4882a593Smuzhiyun reg = <0x00000000 0 0 0 0>; 237*4882a593Smuzhiyun u-boot,dm-pre-reloc; 238*4882a593Smuzhiyun compatible = "intel,bd82x6x-northbridge"; 239*4882a593Smuzhiyun board-id-gpios = <&gpio_b 9 0>, <&gpio_b 10 0>, 240*4882a593Smuzhiyun <&gpio_b 11 0>, <&gpio_a 10 0>; 241*4882a593Smuzhiyun spd { 242*4882a593Smuzhiyun u-boot,dm-pre-reloc; 243*4882a593Smuzhiyun #address-cells = <1>; 244*4882a593Smuzhiyun #size-cells = <0>; 245*4882a593Smuzhiyun elpida_4Gb_1600_x16 { 246*4882a593Smuzhiyun u-boot,dm-pre-reloc; 247*4882a593Smuzhiyun reg = <0>; 248*4882a593Smuzhiyun data = [92 10 0b 03 04 19 02 02 249*4882a593Smuzhiyun 03 52 01 08 0a 00 fe 00 250*4882a593Smuzhiyun 69 78 69 3c 69 11 18 81 251*4882a593Smuzhiyun 20 08 3c 3c 01 40 83 81 252*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 253*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 254*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 255*4882a593Smuzhiyun 00 00 00 00 0f 11 42 00 256*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 257*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 258*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 259*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 260*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 261*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 262*4882a593Smuzhiyun 00 00 00 00 00 02 fe 00 263*4882a593Smuzhiyun 11 52 00 00 00 07 7f 37 264*4882a593Smuzhiyun 45 42 4a 32 30 55 47 36 265*4882a593Smuzhiyun 45 42 55 30 2d 47 4e 2d 266*4882a593Smuzhiyun 46 20 30 20 02 fe 00 00 267*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 268*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 269*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 270*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 271*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 272*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 273*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 274*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 275*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 276*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 277*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 278*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 279*4882a593Smuzhiyun 00 00 00 00 00 00 00 00]; 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun samsung_4Gb_1600_1.35v_x16 { 282*4882a593Smuzhiyun u-boot,dm-pre-reloc; 283*4882a593Smuzhiyun reg = <1>; 284*4882a593Smuzhiyun data = [92 11 0b 03 04 19 02 02 285*4882a593Smuzhiyun 03 11 01 08 0a 00 fe 00 286*4882a593Smuzhiyun 69 78 69 3c 69 11 18 81 287*4882a593Smuzhiyun f0 0a 3c 3c 01 40 83 01 288*4882a593Smuzhiyun 00 80 00 00 00 00 00 00 289*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 290*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 291*4882a593Smuzhiyun 00 00 00 00 0f 11 02 00 292*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 293*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 294*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 295*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 296*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 297*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 298*4882a593Smuzhiyun 00 00 00 00 00 80 ce 01 299*4882a593Smuzhiyun 00 00 00 00 00 00 6a 04 300*4882a593Smuzhiyun 4d 34 37 31 42 35 36 37 301*4882a593Smuzhiyun 34 42 48 30 2d 59 4b 30 302*4882a593Smuzhiyun 20 20 00 00 80 ce 00 00 303*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 304*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 305*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 306*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 307*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 308*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 309*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 310*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 311*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 312*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 313*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 314*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 315*4882a593Smuzhiyun 00 00 00 00 00 00 00 00]; 316*4882a593Smuzhiyun }; 317*4882a593Smuzhiyun micron_4Gb_1600_1.35v_x16 { 318*4882a593Smuzhiyun reg = <2>; 319*4882a593Smuzhiyun data = [92 11 0b 03 04 19 02 02 320*4882a593Smuzhiyun 03 11 01 08 0a 00 fe 00 321*4882a593Smuzhiyun 69 78 69 3c 69 11 18 81 322*4882a593Smuzhiyun 20 08 3c 3c 01 40 83 05 323*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 324*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 325*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 326*4882a593Smuzhiyun 00 00 00 00 0f 01 02 00 327*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 328*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 329*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 330*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 331*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 332*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 333*4882a593Smuzhiyun 00 00 00 00 00 80 2c 00 334*4882a593Smuzhiyun 00 00 00 00 00 00 ad 75 335*4882a593Smuzhiyun 34 4b 54 46 32 35 36 36 336*4882a593Smuzhiyun 34 48 5a 2d 31 47 36 45 337*4882a593Smuzhiyun 31 20 45 31 80 2c 00 00 338*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 339*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 340*4882a593Smuzhiyun 00 00 00 00 00 00 00 00 341*4882a593Smuzhiyun ff ff ff ff ff ff ff ff 342*4882a593Smuzhiyun ff ff ff ff ff ff ff ff 343*4882a593Smuzhiyun ff ff ff ff ff ff ff ff 344*4882a593Smuzhiyun ff ff ff ff ff ff ff ff 345*4882a593Smuzhiyun ff ff ff ff ff ff ff ff 346*4882a593Smuzhiyun ff ff ff ff ff ff ff ff 347*4882a593Smuzhiyun ff ff ff ff ff ff ff ff 348*4882a593Smuzhiyun ff ff ff ff ff ff ff ff 349*4882a593Smuzhiyun ff ff ff ff ff ff ff ff 350*4882a593Smuzhiyun ff ff ff ff ff ff ff ff]; 351*4882a593Smuzhiyun }; 352*4882a593Smuzhiyun }; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun gma@2,0 { 356*4882a593Smuzhiyun reg = <0x00001000 0 0 0 0>; 357*4882a593Smuzhiyun compatible = "intel,gma"; 358*4882a593Smuzhiyun intel,dp_hotplug = <0 0 0x06>; 359*4882a593Smuzhiyun intel,panel-port-select = <1>; 360*4882a593Smuzhiyun intel,panel-power-cycle-delay = <6>; 361*4882a593Smuzhiyun intel,panel-power-up-delay = <2000>; 362*4882a593Smuzhiyun intel,panel-power-down-delay = <500>; 363*4882a593Smuzhiyun intel,panel-power-backlight-on-delay = <2000>; 364*4882a593Smuzhiyun intel,panel-power-backlight-off-delay = <2000>; 365*4882a593Smuzhiyun intel,cpu-backlight = <0x00000200>; 366*4882a593Smuzhiyun intel,pch-backlight = <0x04000000>; 367*4882a593Smuzhiyun }; 368*4882a593Smuzhiyun 369*4882a593Smuzhiyun me@16,0 { 370*4882a593Smuzhiyun reg = <0x0000b000 0 0 0 0>; 371*4882a593Smuzhiyun compatible = "intel,me"; 372*4882a593Smuzhiyun u-boot,dm-pre-reloc; 373*4882a593Smuzhiyun }; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun usb_1: usb@1a,0 { 376*4882a593Smuzhiyun reg = <0x0000d000 0 0 0 0>; 377*4882a593Smuzhiyun compatible = "ehci-pci"; 378*4882a593Smuzhiyun }; 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun usb_0: usb@1d,0 { 381*4882a593Smuzhiyun reg = <0x0000e800 0 0 0 0>; 382*4882a593Smuzhiyun compatible = "ehci-pci"; 383*4882a593Smuzhiyun }; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun pch@1f,0 { 386*4882a593Smuzhiyun reg = <0x0000f800 0 0 0 0>; 387*4882a593Smuzhiyun compatible = "intel,bd82x6x", "intel,pch9"; 388*4882a593Smuzhiyun u-boot,dm-pre-reloc; 389*4882a593Smuzhiyun #address-cells = <1>; 390*4882a593Smuzhiyun #size-cells = <1>; 391*4882a593Smuzhiyun intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b 392*4882a593Smuzhiyun 0x80 0x80 0x80 0x80>; 393*4882a593Smuzhiyun intel,gpi-routing = <0 0 0 0 0 0 0 2 394*4882a593Smuzhiyun 1 0 0 0 0 0 0 0>; 395*4882a593Smuzhiyun /* Enable EC SMI source */ 396*4882a593Smuzhiyun intel,alt-gp-smi-enable = <0x0100>; 397*4882a593Smuzhiyun 398*4882a593Smuzhiyun spi: spi { 399*4882a593Smuzhiyun #address-cells = <1>; 400*4882a593Smuzhiyun #size-cells = <0>; 401*4882a593Smuzhiyun compatible = "intel,ich9-spi"; 402*4882a593Smuzhiyun u-boot,dm-pre-reloc; 403*4882a593Smuzhiyun spi-flash@0 { 404*4882a593Smuzhiyun #size-cells = <1>; 405*4882a593Smuzhiyun #address-cells = <1>; 406*4882a593Smuzhiyun u-boot,dm-pre-reloc; 407*4882a593Smuzhiyun reg = <0>; 408*4882a593Smuzhiyun compatible = "winbond,w25q64", 409*4882a593Smuzhiyun "spi-flash"; 410*4882a593Smuzhiyun memory-map = <0xff800000 0x00800000>; 411*4882a593Smuzhiyun rw-mrc-cache { 412*4882a593Smuzhiyun label = "rw-mrc-cache"; 413*4882a593Smuzhiyun reg = <0x003e0000 0x00010000>; 414*4882a593Smuzhiyun u-boot,dm-pre-reloc; 415*4882a593Smuzhiyun }; 416*4882a593Smuzhiyun }; 417*4882a593Smuzhiyun }; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun gpio_a: gpioa { 420*4882a593Smuzhiyun compatible = "intel,ich6-gpio"; 421*4882a593Smuzhiyun u-boot,dm-pre-reloc; 422*4882a593Smuzhiyun #gpio-cells = <2>; 423*4882a593Smuzhiyun gpio-controller; 424*4882a593Smuzhiyun reg = <0 0x10>; 425*4882a593Smuzhiyun bank-name = "A"; 426*4882a593Smuzhiyun }; 427*4882a593Smuzhiyun 428*4882a593Smuzhiyun gpio_b: gpiob { 429*4882a593Smuzhiyun compatible = "intel,ich6-gpio"; 430*4882a593Smuzhiyun u-boot,dm-pre-reloc; 431*4882a593Smuzhiyun #gpio-cells = <2>; 432*4882a593Smuzhiyun gpio-controller; 433*4882a593Smuzhiyun reg = <0x30 0x10>; 434*4882a593Smuzhiyun bank-name = "B"; 435*4882a593Smuzhiyun }; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun gpio_c: gpioc { 438*4882a593Smuzhiyun compatible = "intel,ich6-gpio"; 439*4882a593Smuzhiyun u-boot,dm-pre-reloc; 440*4882a593Smuzhiyun #gpio-cells = <2>; 441*4882a593Smuzhiyun gpio-controller; 442*4882a593Smuzhiyun reg = <0x40 0x10>; 443*4882a593Smuzhiyun bank-name = "C"; 444*4882a593Smuzhiyun }; 445*4882a593Smuzhiyun 446*4882a593Smuzhiyun lpc { 447*4882a593Smuzhiyun compatible = "intel,bd82x6x-lpc"; 448*4882a593Smuzhiyun #address-cells = <1>; 449*4882a593Smuzhiyun #size-cells = <0>; 450*4882a593Smuzhiyun u-boot,dm-pre-reloc; 451*4882a593Smuzhiyun intel,gen-dec = <0x800 0xfc 0x900 0xfc>; 452*4882a593Smuzhiyun cros-ec@200 { 453*4882a593Smuzhiyun compatible = "google,cros-ec"; 454*4882a593Smuzhiyun reg = <0x204 1 0x200 1 0x880 0x80>; 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun /* 457*4882a593Smuzhiyun * Describes the flash memory within 458*4882a593Smuzhiyun * the EC 459*4882a593Smuzhiyun */ 460*4882a593Smuzhiyun #address-cells = <1>; 461*4882a593Smuzhiyun #size-cells = <1>; 462*4882a593Smuzhiyun flash@8000000 { 463*4882a593Smuzhiyun reg = <0x08000000 0x20000>; 464*4882a593Smuzhiyun erase-value = <0xff>; 465*4882a593Smuzhiyun }; 466*4882a593Smuzhiyun }; 467*4882a593Smuzhiyun }; 468*4882a593Smuzhiyun }; 469*4882a593Smuzhiyun 470*4882a593Smuzhiyun sata@1f,2 { 471*4882a593Smuzhiyun compatible = "intel,pantherpoint-ahci"; 472*4882a593Smuzhiyun reg = <0x0000fa00 0 0 0 0>; 473*4882a593Smuzhiyun u-boot,dm-pre-reloc; 474*4882a593Smuzhiyun intel,sata-mode = "ahci"; 475*4882a593Smuzhiyun intel,sata-port-map = <1>; 476*4882a593Smuzhiyun intel,sata-port0-gen3-tx = <0x00880a7f>; 477*4882a593Smuzhiyun }; 478*4882a593Smuzhiyun 479*4882a593Smuzhiyun smbus: smbus@1f,3 { 480*4882a593Smuzhiyun compatible = "intel,ich-i2c"; 481*4882a593Smuzhiyun reg = <0x0000fb00 0 0 0 0>; 482*4882a593Smuzhiyun u-boot,dm-pre-reloc; 483*4882a593Smuzhiyun }; 484*4882a593Smuzhiyun }; 485*4882a593Smuzhiyun 486*4882a593Smuzhiyun tpm { 487*4882a593Smuzhiyun reg = <0xfed40000 0x5000>; 488*4882a593Smuzhiyun compatible = "infineon,slb9635lpc"; 489*4882a593Smuzhiyun }; 490*4882a593Smuzhiyun 491*4882a593Smuzhiyun microcode { 492*4882a593Smuzhiyun u-boot,dm-pre-reloc; 493*4882a593Smuzhiyun update@0 { 494*4882a593Smuzhiyun u-boot,dm-pre-reloc; 495*4882a593Smuzhiyun#include "microcode/m12306a9_0000001b.dtsi" 496*4882a593Smuzhiyun }; 497*4882a593Smuzhiyun }; 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun}; 500