xref: /OK3568_Linux_fs/u-boot/arch/x86/cpu/x86_64/cpu.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2016 Google, Inc
3*4882a593Smuzhiyun  * Written by Simon Glass <sjg@chromium.org>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <debug_uart.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun /* Global declaration of gd */
14*4882a593Smuzhiyun struct global_data *global_data_ptr;
15*4882a593Smuzhiyun 
arch_setup_gd(gd_t * new_gd)16*4882a593Smuzhiyun void arch_setup_gd(gd_t *new_gd)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun 	global_data_ptr = new_gd;
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun 	/*
21*4882a593Smuzhiyun 	 * TODO(sjg@chromium.org): For some reason U-Boot does not boot
22*4882a593Smuzhiyun 	 * without this line. It fails to start up U-Boot proper and instead
23*4882a593Smuzhiyun 	 * restarts SPL. Need to figure out why:
24*4882a593Smuzhiyun 	 *
25*4882a593Smuzhiyun 	 * U-Boot SPL 2017.01
26*4882a593Smuzhiyun 	 *
27*4882a593Smuzhiyun 	 * U-Boot SPL 2017.01
28*4882a593Smuzhiyun 	 * CPU:   Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz
29*4882a593Smuzhiyun 	 * Trying to boot from SPIJumping to 64-bit U-Boot: Note many
30*4882a593Smuzhiyun 	 * features are missing
31*4882a593Smuzhiyun 	 *
32*4882a593Smuzhiyun 	 * U-Boot SPL 2017.01
33*4882a593Smuzhiyun 	 */
34*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_UART
35*4882a593Smuzhiyun 	printch(' ');
36*4882a593Smuzhiyun #endif
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun 
cpu_has_64bit(void)39*4882a593Smuzhiyun int cpu_has_64bit(void)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	return true;
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun 
enable_caches(void)44*4882a593Smuzhiyun void enable_caches(void)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun 	/* Not implemented */
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun 
disable_caches(void)49*4882a593Smuzhiyun void disable_caches(void)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	/* Not implemented */
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
dcache_status(void)54*4882a593Smuzhiyun int dcache_status(void)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun 	return true;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
x86_mp_init(void)59*4882a593Smuzhiyun int x86_mp_init(void)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	/* Not implemented */
62*4882a593Smuzhiyun 	return 0;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun 
misc_init_r(void)65*4882a593Smuzhiyun int misc_init_r(void)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	return 0;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun 
checkcpu(void)70*4882a593Smuzhiyun int checkcpu(void)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
print_cpuinfo(void)75*4882a593Smuzhiyun int print_cpuinfo(void)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	return 0;
78*4882a593Smuzhiyun }
79