1*4882a593Smuzhiyun# 2*4882a593Smuzhiyun# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3*4882a593Smuzhiyun# 4*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyunconfig INTEL_QUARK 8*4882a593Smuzhiyun bool 9*4882a593Smuzhiyun select HAVE_RMU 10*4882a593Smuzhiyun select ARCH_EARLY_INIT_R 11*4882a593Smuzhiyun select ARCH_MISC_INIT 12*4882a593Smuzhiyun imply ENABLE_MRC_CACHE 13*4882a593Smuzhiyun imply ETH_DESIGNWARE 14*4882a593Smuzhiyun imply ICH_SPI 15*4882a593Smuzhiyun imply INTEL_ICH6_GPIO 16*4882a593Smuzhiyun imply MMC 17*4882a593Smuzhiyun imply MMC_PCI 18*4882a593Smuzhiyun imply MMC_SDHCI 19*4882a593Smuzhiyun imply MMC_SDHCI_SDMA 20*4882a593Smuzhiyun imply SPI_FLASH 21*4882a593Smuzhiyun imply SYS_NS16550 22*4882a593Smuzhiyun imply USB 23*4882a593Smuzhiyun imply USB_EHCI_HCD 24*4882a593Smuzhiyun 25*4882a593Smuzhiyunif INTEL_QUARK 26*4882a593Smuzhiyun 27*4882a593Smuzhiyunconfig HAVE_RMU 28*4882a593Smuzhiyun bool "Add a Remote Management Unit (RMU) binary" 29*4882a593Smuzhiyun help 30*4882a593Smuzhiyun Select this option to add a Remote Management Unit (RMU) binary 31*4882a593Smuzhiyun to the resulting U-Boot image. It is a data block (up to 64K) of 32*4882a593Smuzhiyun machine-specific code which must be put in the flash for the RMU 33*4882a593Smuzhiyun within the Quark SoC processor to access when powered up before 34*4882a593Smuzhiyun system BIOS is executed. 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunconfig RMU_FILE 37*4882a593Smuzhiyun string "Remote Management Unit (RMU) binary filename" 38*4882a593Smuzhiyun depends on HAVE_RMU 39*4882a593Smuzhiyun default "rmu.bin" 40*4882a593Smuzhiyun help 41*4882a593Smuzhiyun The filename of the file to use as Remote Management Unit (RMU) 42*4882a593Smuzhiyun binary in the board directory. 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunconfig RMU_ADDR 45*4882a593Smuzhiyun hex "Remote Management Unit (RMU) binary location" 46*4882a593Smuzhiyun depends on HAVE_RMU 47*4882a593Smuzhiyun default 0xfff00000 48*4882a593Smuzhiyun help 49*4882a593Smuzhiyun The location of the RMU binary is determined by a strap. It must be 50*4882a593Smuzhiyun put in flash at a location matching the strap-determined base address. 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun The default base address of 0xfff00000 indicates that the binary must 53*4882a593Smuzhiyun be located at offset 0 from the beginning of a 1MB flash device. 54*4882a593Smuzhiyun 55*4882a593Smuzhiyunconfig HAVE_CMC 56*4882a593Smuzhiyun bool 57*4882a593Smuzhiyun default HAVE_RMU 58*4882a593Smuzhiyun 59*4882a593Smuzhiyunconfig CMC_FILE 60*4882a593Smuzhiyun string 61*4882a593Smuzhiyun depends on HAVE_CMC 62*4882a593Smuzhiyun default RMU_FILE 63*4882a593Smuzhiyun 64*4882a593Smuzhiyunconfig CMC_ADDR 65*4882a593Smuzhiyun hex 66*4882a593Smuzhiyun depends on HAVE_CMC 67*4882a593Smuzhiyun default RMU_ADDR 68*4882a593Smuzhiyun 69*4882a593Smuzhiyunconfig ESRAM_BASE 70*4882a593Smuzhiyun hex 71*4882a593Smuzhiyun default 0x80000000 72*4882a593Smuzhiyun help 73*4882a593Smuzhiyun Embedded SRAM (eSRAM) memory-mapped base address. 74*4882a593Smuzhiyun 75*4882a593Smuzhiyunconfig PCIE_ECAM_BASE 76*4882a593Smuzhiyun hex 77*4882a593Smuzhiyun default 0xe0000000 78*4882a593Smuzhiyun 79*4882a593Smuzhiyunconfig RCBA_BASE 80*4882a593Smuzhiyun hex 81*4882a593Smuzhiyun default 0xfed1c000 82*4882a593Smuzhiyun help 83*4882a593Smuzhiyun Root Complex register block memory-mapped base address. 84*4882a593Smuzhiyun 85*4882a593Smuzhiyunconfig ACPI_PM1_BASE 86*4882a593Smuzhiyun hex 87*4882a593Smuzhiyun default 0x1000 88*4882a593Smuzhiyun help 89*4882a593Smuzhiyun ACPI Power Managment 1 (PM1) i/o-mapped base address. 90*4882a593Smuzhiyun This device is defined in ACPI specification, with 16 bytes in size. 91*4882a593Smuzhiyun 92*4882a593Smuzhiyunconfig ACPI_PBLK_BASE 93*4882a593Smuzhiyun hex 94*4882a593Smuzhiyun default 0x1010 95*4882a593Smuzhiyun help 96*4882a593Smuzhiyun ACPI Processor Block (PBLK) i/o-mapped base address. 97*4882a593Smuzhiyun This device is defined in ACPI specification, with 16 bytes in size. 98*4882a593Smuzhiyun 99*4882a593Smuzhiyunconfig SPI_DMA_BASE 100*4882a593Smuzhiyun hex 101*4882a593Smuzhiyun default 0x1020 102*4882a593Smuzhiyun help 103*4882a593Smuzhiyun SPI DMA i/o-mapped base address. 104*4882a593Smuzhiyun 105*4882a593Smuzhiyunconfig GPIO_BASE 106*4882a593Smuzhiyun hex 107*4882a593Smuzhiyun default 0x1080 108*4882a593Smuzhiyun help 109*4882a593Smuzhiyun GPIO i/o-mapped base address. 110*4882a593Smuzhiyun 111*4882a593Smuzhiyunconfig ACPI_GPE0_BASE 112*4882a593Smuzhiyun hex 113*4882a593Smuzhiyun default 0x1100 114*4882a593Smuzhiyun help 115*4882a593Smuzhiyun ACPI General Purpose Event 0 (GPE0) i/o-mapped base address. 116*4882a593Smuzhiyun This device is defined in ACPI specification, with 64 bytes in size. 117*4882a593Smuzhiyun 118*4882a593Smuzhiyunconfig WDT_BASE 119*4882a593Smuzhiyun hex 120*4882a593Smuzhiyun default 0x1140 121*4882a593Smuzhiyun help 122*4882a593Smuzhiyun Watchdog timer i/o-mapped base address. 123*4882a593Smuzhiyun 124*4882a593Smuzhiyunconfig SYS_CAR_ADDR 125*4882a593Smuzhiyun hex 126*4882a593Smuzhiyun default ESRAM_BASE 127*4882a593Smuzhiyun 128*4882a593Smuzhiyunconfig SYS_CAR_SIZE 129*4882a593Smuzhiyun hex 130*4882a593Smuzhiyun default 0x8000 131*4882a593Smuzhiyun help 132*4882a593Smuzhiyun Space in bytes in eSRAM used as Cache-As-ARM (CAR). 133*4882a593Smuzhiyun Note this size must not exceed eSRAM's total size. 134*4882a593Smuzhiyun 135*4882a593Smuzhiyunendif 136