1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2016 Google, Inc
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * From coreboot broadwell support
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <dm.h>
11*4882a593Smuzhiyun #include <pch.h>
12*4882a593Smuzhiyun #include <asm/intel_regs.h>
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun #include <asm/lpc_common.h>
15*4882a593Smuzhiyun #include <asm/arch/pch.h>
16*4882a593Smuzhiyun #include <asm/arch/spi.h>
17*4882a593Smuzhiyun
set_spi_speed(void)18*4882a593Smuzhiyun static void set_spi_speed(void)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun u32 fdod;
21*4882a593Smuzhiyun u8 ssfc;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /* Observe SPI Descriptor Component Section 0 */
24*4882a593Smuzhiyun writel(0x1000, SPI_REG(SPIBAR_FDOC));
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* Extract the Write/Erase SPI Frequency from descriptor */
27*4882a593Smuzhiyun fdod = readl(SPI_REG(SPIBAR_FDOD));
28*4882a593Smuzhiyun fdod >>= 24;
29*4882a593Smuzhiyun fdod &= 7;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /* Set Software Sequence frequency to match */
32*4882a593Smuzhiyun ssfc = readb(SPI_REG(SPIBAR_SSFC + 2));
33*4882a593Smuzhiyun ssfc &= ~7;
34*4882a593Smuzhiyun ssfc |= fdod;
35*4882a593Smuzhiyun writeb(ssfc, SPI_REG(SPIBAR_SSFC + 2));
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
broadwell_lpc_early_init(struct udevice * dev)38*4882a593Smuzhiyun static int broadwell_lpc_early_init(struct udevice *dev)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun set_spi_speed();
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun return 0;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
lpc_init_extra(struct udevice * dev)45*4882a593Smuzhiyun static int lpc_init_extra(struct udevice *dev)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun return 0;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
broadwell_lpc_probe(struct udevice * dev)50*4882a593Smuzhiyun static int broadwell_lpc_probe(struct udevice *dev)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun int ret;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun if (!(gd->flags & GD_FLG_RELOC)) {
55*4882a593Smuzhiyun ret = lpc_common_early_init(dev);
56*4882a593Smuzhiyun if (ret) {
57*4882a593Smuzhiyun debug("%s: lpc_early_init() failed\n", __func__);
58*4882a593Smuzhiyun return ret;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun return broadwell_lpc_early_init(dev);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun return lpc_init_extra(dev);
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun static const struct udevice_id broadwell_lpc_ids[] = {
68*4882a593Smuzhiyun { .compatible = "intel,broadwell-lpc" },
69*4882a593Smuzhiyun { }
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun U_BOOT_DRIVER(broadwell_lpc_drv) = {
73*4882a593Smuzhiyun .name = "lpc",
74*4882a593Smuzhiyun .id = UCLASS_LPC,
75*4882a593Smuzhiyun .of_match = broadwell_lpc_ids,
76*4882a593Smuzhiyun .probe = broadwell_lpc_probe,
77*4882a593Smuzhiyun };
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