1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <common.h> 8*4882a593Smuzhiyun #include <mmc.h> 9*4882a593Smuzhiyun #include <pci_ids.h> 10*4882a593Smuzhiyun #include <asm/irq.h> 11*4882a593Smuzhiyun #include <asm/mrccache.h> 12*4882a593Smuzhiyun #include <asm/post.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #ifndef CONFIG_EFI_APP arch_cpu_init(void)15*4882a593Smuzhiyunint arch_cpu_init(void) 16*4882a593Smuzhiyun { 17*4882a593Smuzhiyun post_code(POST_CPU_INIT); 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun return x86_cpu_init_f(); 20*4882a593Smuzhiyun } 21*4882a593Smuzhiyun arch_misc_init(void)22*4882a593Smuzhiyunint arch_misc_init(void) 23*4882a593Smuzhiyun { 24*4882a593Smuzhiyun if (!ll_boot_init()) 25*4882a593Smuzhiyun return 0; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #ifdef CONFIG_ENABLE_MRC_CACHE 28*4882a593Smuzhiyun /* 29*4882a593Smuzhiyun * We intend not to check any return value here, as even MRC cache 30*4882a593Smuzhiyun * is not saved successfully, it is not a severe error that will 31*4882a593Smuzhiyun * prevent system from continuing to boot. 32*4882a593Smuzhiyun */ 33*4882a593Smuzhiyun mrccache_save(); 34*4882a593Smuzhiyun #endif 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun return 0; 37*4882a593Smuzhiyun } 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #endif 40*4882a593Smuzhiyun reset_cpu(ulong addr)41*4882a593Smuzhiyunvoid reset_cpu(ulong addr) 42*4882a593Smuzhiyun { 43*4882a593Smuzhiyun /* cold reset */ 44*4882a593Smuzhiyun x86_full_reset(); 45*4882a593Smuzhiyun } 46