1*4882a593Smuzhiyun# 2*4882a593Smuzhiyun# Copyright (C) 2015 Google, Inc 3*4882a593Smuzhiyun# 4*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyunconfig INTEL_BAYTRAIL 8*4882a593Smuzhiyun bool 9*4882a593Smuzhiyun select HAVE_FSP if !EFI 10*4882a593Smuzhiyun select ARCH_MISC_INIT if !EFI 11*4882a593Smuzhiyun select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED 12*4882a593Smuzhiyun imply HAVE_INTEL_ME if !EFI 13*4882a593Smuzhiyun imply ENABLE_MRC_CACHE 14*4882a593Smuzhiyun imply AHCI_PCI 15*4882a593Smuzhiyun imply ICH_SPI 16*4882a593Smuzhiyun imply INTEL_ICH6_GPIO 17*4882a593Smuzhiyun imply MMC 18*4882a593Smuzhiyun imply MMC_PCI 19*4882a593Smuzhiyun imply MMC_SDHCI 20*4882a593Smuzhiyun imply MMC_SDHCI_SDMA 21*4882a593Smuzhiyun imply SCSI 22*4882a593Smuzhiyun imply SPI_FLASH 23*4882a593Smuzhiyun imply SYS_NS16550 24*4882a593Smuzhiyun imply USB 25*4882a593Smuzhiyun imply USB_EHCI_HCD 26*4882a593Smuzhiyun imply USB_XHCI_HCD 27*4882a593Smuzhiyun imply VIDEO_VESA 28*4882a593Smuzhiyun 29*4882a593Smuzhiyunif INTEL_BAYTRAIL 30*4882a593Smuzhiyunconfig INTERNAL_UART 31*4882a593Smuzhiyun bool "Enable the SoC integrated legacy UART" 32*4882a593Smuzhiyun help 33*4882a593Smuzhiyun There is a legacy UART integrated into the Bay Trail SoC. 34*4882a593Smuzhiyun A maximum baud rate of 115200 bps is supported. For this 35*4882a593Smuzhiyun reason, it is recommended that the UART port be used for 36*4882a593Smuzhiyun debug purposes only, eg: U-Boot console. 37*4882a593Smuzhiyun 38*4882a593Smuzhiyunconfig DEBUG_UART 39*4882a593Smuzhiyun bool 40*4882a593Smuzhiyun select DEBUG_UART_BOARD_INIT 41*4882a593Smuzhiyun 42*4882a593Smuzhiyunendif 43