xref: /OK3568_Linux_fs/u-boot/arch/sh/include/asm/cpu_sh7763.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2008 Renesas Solutions Corp.
3*4882a593Smuzhiyun  * Copyright (C) 2007,2008 Nobuhiro Iwamatsu
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #ifndef _ASM_CPU_SH7763_H_
8*4882a593Smuzhiyun #define _ASM_CPU_SH7763_H_
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun /* CACHE */
11*4882a593Smuzhiyun #define CACHE_OC_NUM_WAYS	1
12*4882a593Smuzhiyun #define CCR				0xFF00001C
13*4882a593Smuzhiyun #define CCR_CACHE_INIT	0x0000090b
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun /* SCIF */
16*4882a593Smuzhiyun /* SCIF0 */
17*4882a593Smuzhiyun #define SCIF0_BASE	SCSMR0
18*4882a593Smuzhiyun #define SCSMR0		0xFFE00000
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /* SCIF1 */
21*4882a593Smuzhiyun #define SCIF1_BASE	SCSMR1
22*4882a593Smuzhiyun #define SCSMR1		0xFFE08000
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* SCIF2 */
25*4882a593Smuzhiyun #define SCIF2_BASE	SCSMR2
26*4882a593Smuzhiyun #define SCSMR2		0xFFE10000
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun /* Watchdog Timer */
29*4882a593Smuzhiyun #define WTCNT		WDTST
30*4882a593Smuzhiyun #define WDTST		0xFFCC0000
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /* TMU */
33*4882a593Smuzhiyun #define TMU_BASE	0xFFD80000
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #endif /* _ASM_CPU_SH7763_H_ */
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