1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SH7722 Internal I/O register 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _ASM_CPU_SH7722_H_ 10*4882a593Smuzhiyun #define _ASM_CPU_SH7722_H_ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define CACHE_OC_NUM_WAYS 4 13*4882a593Smuzhiyun #define CCR_CACHE_INIT 0x0000090d 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* EXP */ 16*4882a593Smuzhiyun #define TRA 0xFF000020 17*4882a593Smuzhiyun #define EXPEVT 0xFF000024 18*4882a593Smuzhiyun #define INTEVT 0xFF000028 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* MMU */ 21*4882a593Smuzhiyun #define PTEH 0xFF000000 22*4882a593Smuzhiyun #define PTEL 0xFF000004 23*4882a593Smuzhiyun #define TTB 0xFF000008 24*4882a593Smuzhiyun #define TEA 0xFF00000C 25*4882a593Smuzhiyun #define MMUCR 0xFF000010 26*4882a593Smuzhiyun #define PASCR 0xFF000070 27*4882a593Smuzhiyun #define IRMCR 0xFF000078 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* CACHE */ 30*4882a593Smuzhiyun #define CCR 0xFF00001C 31*4882a593Smuzhiyun #define RAMCR 0xFF000074 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* XY MEMORY */ 34*4882a593Smuzhiyun #define XSA 0xFF000050 35*4882a593Smuzhiyun #define YSA 0xFF000054 36*4882a593Smuzhiyun #define XDA 0xFF000058 37*4882a593Smuzhiyun #define YDA 0xFF00005C 38*4882a593Smuzhiyun #define XPR 0xFF000060 39*4882a593Smuzhiyun #define YPR 0xFF000064 40*4882a593Smuzhiyun #define XEA 0xFF000068 41*4882a593Smuzhiyun #define YEA 0xFF00006C 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun /* INTC */ 44*4882a593Smuzhiyun #define ICR0 0xA4140000 45*4882a593Smuzhiyun #define ICR1 0xA414001C 46*4882a593Smuzhiyun #define INTPRI0 0xA4140010 47*4882a593Smuzhiyun #define INTREQ0 0xA4140024 48*4882a593Smuzhiyun #define INTMSK0 0xA4140044 49*4882a593Smuzhiyun #define INTMSKCLR0 0xA4140064 50*4882a593Smuzhiyun #define NMIFCR 0xA41400C0 51*4882a593Smuzhiyun #define USERIMASK 0xA4700000 52*4882a593Smuzhiyun #define IPRA 0xA4080000 53*4882a593Smuzhiyun #define IPRB 0xA4080004 54*4882a593Smuzhiyun #define IPRC 0xA4080008 55*4882a593Smuzhiyun #define IPRD 0xA408000C 56*4882a593Smuzhiyun #define IPRE 0xA4080010 57*4882a593Smuzhiyun #define IPRF 0xA4080014 58*4882a593Smuzhiyun #define IPRG 0xA4080018 59*4882a593Smuzhiyun #define IPRH 0xA408001C 60*4882a593Smuzhiyun #define IPRI 0xA4080020 61*4882a593Smuzhiyun #define IPRJ 0xA4080024 62*4882a593Smuzhiyun #define IPRK 0xA4080028 63*4882a593Smuzhiyun #define IPRL 0xA408002C 64*4882a593Smuzhiyun #define IMR0 0xA4080080 65*4882a593Smuzhiyun #define IMR1 0xA4080084 66*4882a593Smuzhiyun #define IMR2 0xA4080088 67*4882a593Smuzhiyun #define IMR3 0xA408008C 68*4882a593Smuzhiyun #define IMR4 0xA4080090 69*4882a593Smuzhiyun #define IMR5 0xA4080094 70*4882a593Smuzhiyun #define IMR6 0xA4080098 71*4882a593Smuzhiyun #define IMR7 0xA408009C 72*4882a593Smuzhiyun #define IMR8 0xA40800A0 73*4882a593Smuzhiyun #define IMR9 0xA40800A4 74*4882a593Smuzhiyun #define IMR10 0xA40800A8 75*4882a593Smuzhiyun #define IMR11 0xA40800AC 76*4882a593Smuzhiyun #define IMCR0 0xA40800C0 77*4882a593Smuzhiyun #define IMCR1 0xA40800C4 78*4882a593Smuzhiyun #define IMCR2 0xA40800C8 79*4882a593Smuzhiyun #define IMCR3 0xA40800CC 80*4882a593Smuzhiyun #define IMCR4 0xA40800D0 81*4882a593Smuzhiyun #define IMCR5 0xA40800D4 82*4882a593Smuzhiyun #define IMCR6 0xA40800D8 83*4882a593Smuzhiyun #define IMCR7 0xA40800DC 84*4882a593Smuzhiyun #define IMCR8 0xA40800E0 85*4882a593Smuzhiyun #define IMCR9 0xA40800E4 86*4882a593Smuzhiyun #define IMCR10 0xA40800E8 87*4882a593Smuzhiyun #define IMCR11 0xA40800EC 88*4882a593Smuzhiyun #define MFI_IPRA 0xA40B0000 89*4882a593Smuzhiyun #define MFI_IPRB 0xA40B0004 90*4882a593Smuzhiyun #define MFI_IPRC 0xA40B0008 91*4882a593Smuzhiyun #define MFI_IPRD 0xA40B000C 92*4882a593Smuzhiyun #define MFI_IPRE 0xA40B0010 93*4882a593Smuzhiyun #define MFI_IPRF 0xA40B0014 94*4882a593Smuzhiyun #define MFI_IPRG 0xA40B0018 95*4882a593Smuzhiyun #define MFI_IPRH 0xA40B001C 96*4882a593Smuzhiyun #define MFI_IPRI 0xA40B0020 97*4882a593Smuzhiyun #define MFI_IPRJ 0xA40B0024 98*4882a593Smuzhiyun #define MFI_IPRK 0xA40B0028 99*4882a593Smuzhiyun #define MFI_IPRL 0xA40B002C 100*4882a593Smuzhiyun #define MFI_IMR0 0xA40B0080 101*4882a593Smuzhiyun #define MFI_IMR1 0xA40B0084 102*4882a593Smuzhiyun #define MFI_IMR2 0xA40B0088 103*4882a593Smuzhiyun #define MFI_IMR3 0xA40B008C 104*4882a593Smuzhiyun #define MFI_IMR4 0xA40B0090 105*4882a593Smuzhiyun #define MFI_IMR5 0xA40B0094 106*4882a593Smuzhiyun #define MFI_IMR6 0xA40B0098 107*4882a593Smuzhiyun #define MFI_IMR7 0xA40B009C 108*4882a593Smuzhiyun #define MFI_IMR8 0xA40B00A0 109*4882a593Smuzhiyun #define MFI_IMR9 0xA40B00A4 110*4882a593Smuzhiyun #define MFI_IMR10 0xA40B00A8 111*4882a593Smuzhiyun #define MFI_IMR11 0xA40B00AC 112*4882a593Smuzhiyun #define MFI_IMCR0 0xA40B00C0 113*4882a593Smuzhiyun #define MFI_IMCR1 0xA40B00C4 114*4882a593Smuzhiyun #define MFI_IMCR2 0xA40B00C8 115*4882a593Smuzhiyun #define MFI_IMCR3 0xA40B00CC 116*4882a593Smuzhiyun #define MFI_IMCR4 0xA40B00D0 117*4882a593Smuzhiyun #define MFI_IMCR5 0xA40B00D4 118*4882a593Smuzhiyun #define MFI_IMCR6 0xA40B00D8 119*4882a593Smuzhiyun #define MFI_IMCR7 0xA40B00DC 120*4882a593Smuzhiyun #define MFI_IMCR8 0xA40B00E0 121*4882a593Smuzhiyun #define MFI_IMCR9 0xA40B00E4 122*4882a593Smuzhiyun #define MFI_IMCR10 0xA40B00E8 123*4882a593Smuzhiyun #define MFI_IMCR11 0xA40B00EC 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun /* BSC */ 126*4882a593Smuzhiyun #define CMNCR 0xFEC10000 127*4882a593Smuzhiyun #define CS0BCR 0xFEC10004 128*4882a593Smuzhiyun #define CS2BCR 0xFEC10008 129*4882a593Smuzhiyun #define CS4BCR 0xFEC10010 130*4882a593Smuzhiyun #define CS5ABCR 0xFEC10014 131*4882a593Smuzhiyun #define CS5BBCR 0xFEC10018 132*4882a593Smuzhiyun #define CS6ABCR 0xFEC1001C 133*4882a593Smuzhiyun #define CS6BBCR 0xFEC10020 134*4882a593Smuzhiyun #define CS0WCR 0xFEC10024 135*4882a593Smuzhiyun #define CS2WCR 0xFEC10028 136*4882a593Smuzhiyun #define CS4WCR 0xFEC10030 137*4882a593Smuzhiyun #define CS5AWCR 0xFEC10034 138*4882a593Smuzhiyun #define CS5BWCR 0xFEC10038 139*4882a593Smuzhiyun #define CS6AWCR 0xFEC1003C 140*4882a593Smuzhiyun #define CS6BWCR 0xFEC10040 141*4882a593Smuzhiyun #define RBWTCNT 0xFEC10054 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun /* SBSC */ 144*4882a593Smuzhiyun #define SBSC_SDCR 0xFE400008 145*4882a593Smuzhiyun #define SBSC_SDWCR 0xFE40000C 146*4882a593Smuzhiyun #define SBSC_SDPCR 0xFE400010 147*4882a593Smuzhiyun #define SBSC_RTCSR 0xFE400014 148*4882a593Smuzhiyun #define SBSC_RTCNT 0xFE400018 149*4882a593Smuzhiyun #define SBSC_RTCOR 0xFE40001C 150*4882a593Smuzhiyun #define SBSC_RFCR 0xFE400020 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun /* DMAC */ 153*4882a593Smuzhiyun #define SAR_0 0xFE008020 154*4882a593Smuzhiyun #define DAR_0 0xFE008024 155*4882a593Smuzhiyun #define TCR_0 0xFE008028 156*4882a593Smuzhiyun #define CHCR_0 0xFE00802C 157*4882a593Smuzhiyun #define SAR_1 0xFE008030 158*4882a593Smuzhiyun #define DAR_1 0xFE008034 159*4882a593Smuzhiyun #define TCR_1 0xFE008038 160*4882a593Smuzhiyun #define CHCR_1 0xFE00803C 161*4882a593Smuzhiyun #define SAR_2 0xFE008040 162*4882a593Smuzhiyun #define DAR_2 0xFE008044 163*4882a593Smuzhiyun #define TCR_2 0xFE008048 164*4882a593Smuzhiyun #define CHCR_2 0xFE00804C 165*4882a593Smuzhiyun #define SAR_3 0xFE008050 166*4882a593Smuzhiyun #define DAR_3 0xFE008054 167*4882a593Smuzhiyun #define TCR_3 0xFE008058 168*4882a593Smuzhiyun #define CHCR_3 0xFE00805C 169*4882a593Smuzhiyun #define SAR_4 0xFE008070 170*4882a593Smuzhiyun #define DAR_4 0xFE008074 171*4882a593Smuzhiyun #define TCR_4 0xFE008078 172*4882a593Smuzhiyun #define CHCR_4 0xFE00807C 173*4882a593Smuzhiyun #define SAR_5 0xFE008080 174*4882a593Smuzhiyun #define DAR_5 0xFE008084 175*4882a593Smuzhiyun #define TCR_5 0xFE008088 176*4882a593Smuzhiyun #define CHCR_5 0xFE00808C 177*4882a593Smuzhiyun #define SARB_0 0xFE008120 178*4882a593Smuzhiyun #define DARB_0 0xFE008124 179*4882a593Smuzhiyun #define TCRB_0 0xFE008128 180*4882a593Smuzhiyun #define SARB_1 0xFE008130 181*4882a593Smuzhiyun #define DARB_1 0xFE008134 182*4882a593Smuzhiyun #define TCRB_1 0xFE008138 183*4882a593Smuzhiyun #define SARB_2 0xFE008140 184*4882a593Smuzhiyun #define DARB_2 0xFE008144 185*4882a593Smuzhiyun #define TCRB_2 0xFE008148 186*4882a593Smuzhiyun #define SARB_3 0xFE008150 187*4882a593Smuzhiyun #define DARB_3 0xFE008154 188*4882a593Smuzhiyun #define TCRB_3 0xFE008158 189*4882a593Smuzhiyun #define DMAOR 0xFE008060 190*4882a593Smuzhiyun #define DMARS_0 0xFE009000 191*4882a593Smuzhiyun #define DMARS_1 0xFE009004 192*4882a593Smuzhiyun #define DMARS_2 0xFE009008 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun /* CPG */ 195*4882a593Smuzhiyun #define FRQCR 0xA4150000 196*4882a593Smuzhiyun #define VCLKCR 0xA4150004 197*4882a593Smuzhiyun #define SCLKACR 0xA4150008 198*4882a593Smuzhiyun #define SCLKBCR 0xA415000C 199*4882a593Smuzhiyun #define PLLCR 0xA4150024 200*4882a593Smuzhiyun #define DLLFRQ 0xA4150050 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun /* LOW POWER MODE */ 203*4882a593Smuzhiyun #define STBCR 0xA4150020 204*4882a593Smuzhiyun #define MSTPCR0 0xA4150030 205*4882a593Smuzhiyun #define MSTPCR1 0xA4150034 206*4882a593Smuzhiyun #define MSTPCR2 0xA4150038 207*4882a593Smuzhiyun #define BAR 0xA4150040 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun /* RWDT */ 210*4882a593Smuzhiyun #define RWTCNT 0xA4520000 211*4882a593Smuzhiyun #define RWTCSR 0xA4520004 212*4882a593Smuzhiyun #define WTCNT RWTCNT 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun /* TMU */ 216*4882a593Smuzhiyun #define TMU_BASE 0xFFD80000 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun /* TPU */ 219*4882a593Smuzhiyun #define TPU_TSTR 0xA4C90000 220*4882a593Smuzhiyun #define TPU_TCR0 0xA4C90010 221*4882a593Smuzhiyun #define TPU_TMDR0 0xA4C90014 222*4882a593Smuzhiyun #define TPU_TIOR0 0xA4C90018 223*4882a593Smuzhiyun #define TPU_TIER0 0xA4C9001C 224*4882a593Smuzhiyun #define TPU_TSR0 0xA4C90020 225*4882a593Smuzhiyun #define TPU_TCNT0 0xA4C90024 226*4882a593Smuzhiyun #define TPU_TGR0A 0xA4C90028 227*4882a593Smuzhiyun #define TPU_TGR0B 0xA4C9002C 228*4882a593Smuzhiyun #define TPU_TGR0C 0xA4C90030 229*4882a593Smuzhiyun #define TPU_TGR0D 0xA4C90034 230*4882a593Smuzhiyun #define TPU_TCR1 0xA4C90050 231*4882a593Smuzhiyun #define TPU_TMDR1 0xA4C90054 232*4882a593Smuzhiyun #define TPU_TIER1 0xA4C9005C 233*4882a593Smuzhiyun #define TPU_TSR1 0xA4C90060 234*4882a593Smuzhiyun #define TPU_TCNT1 0xA4C90064 235*4882a593Smuzhiyun #define TPU_TGR1A 0xA4C90068 236*4882a593Smuzhiyun #define TPU_TGR1B 0xA4C9006C 237*4882a593Smuzhiyun #define TPU_TGR1C 0xA4C90070 238*4882a593Smuzhiyun #define TPU_TGR1D 0xA4C90074 239*4882a593Smuzhiyun #define TPU_TCR2 0xA4C90090 240*4882a593Smuzhiyun #define TPU_TMDR2 0xA4C90094 241*4882a593Smuzhiyun #define TPU_TIER2 0xA4C9009C 242*4882a593Smuzhiyun #define TPU_TSR2 0xA4C900A0 243*4882a593Smuzhiyun #define TPU_TCNT2 0xA4C900A4 244*4882a593Smuzhiyun #define TPU_TGR2A 0xA4C900A8 245*4882a593Smuzhiyun #define TPU_TGR2B 0xA4C900AC 246*4882a593Smuzhiyun #define TPU_TGR2C 0xA4C900B0 247*4882a593Smuzhiyun #define TPU_TGR2D 0xA4C900B4 248*4882a593Smuzhiyun #define TPU_TCR3 0xA4C900D0 249*4882a593Smuzhiyun #define TPU_TMDR3 0xA4C900D4 250*4882a593Smuzhiyun #define TPU_TIER3 0xA4C900DC 251*4882a593Smuzhiyun #define TPU_TSR3 0xA4C900E0 252*4882a593Smuzhiyun #define TPU_TCNT3 0xA4C900E4 253*4882a593Smuzhiyun #define TPU_TGR3A 0xA4C900E8 254*4882a593Smuzhiyun #define TPU_TGR3B 0xA4C900EC 255*4882a593Smuzhiyun #define TPU_TGR3C 0xA4C900F0 256*4882a593Smuzhiyun #define TPU_TGR3D 0xA4C900F4 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun /* CMT */ 259*4882a593Smuzhiyun #define CMSTR 0xA44A0000 260*4882a593Smuzhiyun #define CMCSR 0xA44A0060 261*4882a593Smuzhiyun #define CMCNT 0xA44A0064 262*4882a593Smuzhiyun #define CMCOR 0xA44A0068 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun /* SIO */ 265*4882a593Smuzhiyun #define SIOMDR 0xA4500000 266*4882a593Smuzhiyun #define SIOCTR 0xA4500004 267*4882a593Smuzhiyun #define SIOSTBCR0 0xA4500008 268*4882a593Smuzhiyun #define SIOSTBCR1 0xA450000C 269*4882a593Smuzhiyun #define SIOTDR 0xA4500014 270*4882a593Smuzhiyun #define SIORDR 0xA4500018 271*4882a593Smuzhiyun #define SIOSTR 0xA450001C 272*4882a593Smuzhiyun #define SIOIER 0xA4500020 273*4882a593Smuzhiyun #define SIOSCR 0xA4500024 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun /* SIOF */ 276*4882a593Smuzhiyun #define SIMDR0 0xA4410000 277*4882a593Smuzhiyun #define SISCR0 0xA4410002 278*4882a593Smuzhiyun #define SITDAR0 0xA4410004 279*4882a593Smuzhiyun #define SIRDAR0 0xA4410006 280*4882a593Smuzhiyun #define SICDAR0 0xA4410008 281*4882a593Smuzhiyun #define SICTR0 0xA441000C 282*4882a593Smuzhiyun #define SIFCTR0 0xA4410010 283*4882a593Smuzhiyun #define SISTR0 0xA4410014 284*4882a593Smuzhiyun #define SIIER0 0xA4410016 285*4882a593Smuzhiyun #define SITDR0 0xA4410020 286*4882a593Smuzhiyun #define SIRDR0 0xA4410024 287*4882a593Smuzhiyun #define SITCR0 0xA4410028 288*4882a593Smuzhiyun #define SIRCR0 0xA441002C 289*4882a593Smuzhiyun #define SPICR0 0xA4410030 290*4882a593Smuzhiyun #define SIMDR1 0xA4420000 291*4882a593Smuzhiyun #define SISCR1 0xA4420002 292*4882a593Smuzhiyun #define SITDAR1 0xA4420004 293*4882a593Smuzhiyun #define SIRDAR1 0xA4420006 294*4882a593Smuzhiyun #define SICDAR1 0xA4420008 295*4882a593Smuzhiyun #define SICTR1 0xA442000C 296*4882a593Smuzhiyun #define SIFCTR1 0xA4420010 297*4882a593Smuzhiyun #define SISTR1 0xA4420014 298*4882a593Smuzhiyun #define SIIER1 0xA4420016 299*4882a593Smuzhiyun #define SITDR1 0xA4420020 300*4882a593Smuzhiyun #define SIRDR1 0xA4420024 301*4882a593Smuzhiyun #define SITCR1 0xA4420028 302*4882a593Smuzhiyun #define SIRCR1 0xA442002C 303*4882a593Smuzhiyun #define SPICR1 0xA4420030 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun /* SCIF */ 306*4882a593Smuzhiyun #define SCIF0_BASE 0xFFE00000 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun /* SIM */ 309*4882a593Smuzhiyun #define SIM_SCSMR 0xA4490000 310*4882a593Smuzhiyun #define SIM_SCBRR 0xA4490002 311*4882a593Smuzhiyun #define SIM_SCSCR 0xA4490004 312*4882a593Smuzhiyun #define SIM_SCTDR 0xA4490006 313*4882a593Smuzhiyun #define SIM_SCSSR 0xA4490008 314*4882a593Smuzhiyun #define SIM_SCRDR 0xA449000A 315*4882a593Smuzhiyun #define SIM_SCSCMR 0xA449000C 316*4882a593Smuzhiyun #define SIM_SCSC2R 0xA449000E 317*4882a593Smuzhiyun #define SIM_SCWAIT 0xA4490010 318*4882a593Smuzhiyun #define SIM_SCGRD 0xA4490012 319*4882a593Smuzhiyun #define SIM_SCSMPL 0xA4490014 320*4882a593Smuzhiyun #define SIM_SCDMAEN 0xA4490016 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun /* IrDA */ 323*4882a593Smuzhiyun #define IRIF_INIT1 0xA45D0012 324*4882a593Smuzhiyun #define IRIF_INIT2 0xA45D0014 325*4882a593Smuzhiyun #define IRIF_RINTCLR 0xA45D0016 326*4882a593Smuzhiyun #define IRIF_TINTCLR 0xA45D0018 327*4882a593Smuzhiyun #define IRIF_SIR0 0xA45D0020 328*4882a593Smuzhiyun #define IRIF_SIR1 0xA45D0022 329*4882a593Smuzhiyun #define IRIF_SIR2 0xA45D0024 330*4882a593Smuzhiyun #define IRIF_SIR3 0xA45D0026 331*4882a593Smuzhiyun #define IRIF_SIR_FRM 0xA45D0028 332*4882a593Smuzhiyun #define IRIF_SIR_EOF 0xA45D002A 333*4882a593Smuzhiyun #define IRIF_SIR_FLG 0xA45D002C 334*4882a593Smuzhiyun #define IRIF_SIR_STS2 0xA45D002E 335*4882a593Smuzhiyun #define IRIF_UART0 0xA45D0030 336*4882a593Smuzhiyun #define IRIF_UART1 0xA45D0032 337*4882a593Smuzhiyun #define IRIF_UART2 0xA45D0034 338*4882a593Smuzhiyun #define IRIF_UART3 0xA45D0036 339*4882a593Smuzhiyun #define IRIF_UART4 0xA45D0038 340*4882a593Smuzhiyun #define IRIF_UART5 0xA45D003A 341*4882a593Smuzhiyun #define IRIF_UART6 0xA45D003C 342*4882a593Smuzhiyun #define IRIF_UART7 0xA45D003E 343*4882a593Smuzhiyun #define IRIF_CRC0 0xA45D0040 344*4882a593Smuzhiyun #define IRIF_CRC1 0xA45D0042 345*4882a593Smuzhiyun #define IRIF_CRC2 0xA45D0044 346*4882a593Smuzhiyun #define IRIF_CRC3 0xA45D0046 347*4882a593Smuzhiyun #define IRIF_CRC4 0xA45D0048 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun /* IIC */ 350*4882a593Smuzhiyun #define ICDR0 0xA4470000 351*4882a593Smuzhiyun #define ICCR0 0xA4470004 352*4882a593Smuzhiyun #define ICSR0 0xA4470008 353*4882a593Smuzhiyun #define ICIC0 0xA447000C 354*4882a593Smuzhiyun #define ICCL0 0xA4470010 355*4882a593Smuzhiyun #define ICCH0 0xA4470014 356*4882a593Smuzhiyun #define ICDR1 0xA4750000 357*4882a593Smuzhiyun #define ICCR1 0xA4750004 358*4882a593Smuzhiyun #define ICSR1 0xA4750008 359*4882a593Smuzhiyun #define ICIC1 0xA475000C 360*4882a593Smuzhiyun #define ICCL1 0xA4750010 361*4882a593Smuzhiyun #define ICCH1 0xA4750014 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun /* FLCTL */ 364*4882a593Smuzhiyun #define FLCMNCR 0xA4530000 365*4882a593Smuzhiyun #define FLCMDCR 0xA4530004 366*4882a593Smuzhiyun #define FLCMCDR 0xA4530008 367*4882a593Smuzhiyun #define FLADR 0xA453000C 368*4882a593Smuzhiyun #define FLDATAR 0xA4530010 369*4882a593Smuzhiyun #define FLDTCNTR 0xA4530014 370*4882a593Smuzhiyun #define FLINTDMACR 0xA4530018 371*4882a593Smuzhiyun #define FLBSYTMR 0xA453001C 372*4882a593Smuzhiyun #define FLBSYCNT 0xA4530020 373*4882a593Smuzhiyun #define FLDTFIFO 0xA4530024 374*4882a593Smuzhiyun #define FLECFIFO 0xA4530028 375*4882a593Smuzhiyun #define FLTRCR 0xA453002C 376*4882a593Smuzhiyun #define FLADR2 0xA453003C 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun /* MFI */ 379*4882a593Smuzhiyun #define MFIIDX 0xA4C10000 380*4882a593Smuzhiyun #define MFIGSR 0xA4C10004 381*4882a593Smuzhiyun #define MFISCR 0xA4C10008 382*4882a593Smuzhiyun #define MFIMCR 0xA4C1000C 383*4882a593Smuzhiyun #define MFIIICR 0xA4C10010 384*4882a593Smuzhiyun #define MFIEICR 0xA4C10014 385*4882a593Smuzhiyun #define MFIADR 0xA4C10018 386*4882a593Smuzhiyun #define MFIDATA 0xA4C1001C 387*4882a593Smuzhiyun #define MFIRCR 0xA4C10020 388*4882a593Smuzhiyun #define MFIINTEVT 0xA4C1002C 389*4882a593Smuzhiyun #define MFIIMASK 0xA4C10030 390*4882a593Smuzhiyun #define MFIBCR 0xA4C10040 391*4882a593Smuzhiyun #define MFIADRW 0xA4C10044 392*4882a593Smuzhiyun #define MFIADRR 0xA4C10048 393*4882a593Smuzhiyun #define MFIDATAW 0xA4C1004C 394*4882a593Smuzhiyun #define MFIDATAR 0xA4C10050 395*4882a593Smuzhiyun #define MFIMCRW 0xA4C10054 396*4882a593Smuzhiyun #define MFIMCRR 0xA4C10058 397*4882a593Smuzhiyun #define MFIDNRW 0xA4C1005C 398*4882a593Smuzhiyun #define MFIDNRR 0xA4C10060 399*4882a593Smuzhiyun #define MFISIZEW 0xA4C10064 400*4882a593Smuzhiyun #define MFISIZER 0xA4C10068 401*4882a593Smuzhiyun #define MFIDEVCR 0xA4C10038 402*4882a593Smuzhiyun #define MFISM4 0xA4C10080 403*4882a593Smuzhiyun 404*4882a593Smuzhiyun /* VPU */ 405*4882a593Smuzhiyun #define VP4_CTRL 0xFE900000 406*4882a593Smuzhiyun #define VP4_VOL_CTRL 0xFE900004 407*4882a593Smuzhiyun #define VP4_IMAGE_SIZE 0xFE900008 408*4882a593Smuzhiyun #define VP4_MB_NUM 0xFE90000C 409*4882a593Smuzhiyun #define VP4_DWY_ADDR 0xFE900010 410*4882a593Smuzhiyun #define VP4_DWC_ADDR 0xFE900014 411*4882a593Smuzhiyun #define VP4_D2WY_ADDR 0xFE900018 412*4882a593Smuzhiyun #define VP4_D2WC_ADDR 0xFE90001C 413*4882a593Smuzhiyun #define VP4_DP1_ADDR 0xFE900020 414*4882a593Smuzhiyun #define VP4_DP2_ADDR 0xFE900024 415*4882a593Smuzhiyun #define VP4_STRS_ADDR 0xFE900028 416*4882a593Smuzhiyun #define VP4_STRE_ADDR 0xFE90002C 417*4882a593Smuzhiyun #define VP4_VOP_CTRL 0xFE900030 418*4882a593Smuzhiyun #define VP4_VOP_TIME 0xFE900034 419*4882a593Smuzhiyun #define VP4_263_CTRL 0xFE900038 420*4882a593Smuzhiyun #define VP4_264_CTRL 0xFE90003C 421*4882a593Smuzhiyun #define VP4_VLC_CTRL 0xFE900040 422*4882a593Smuzhiyun #define VP4_ENDIAN 0xFE900044 423*4882a593Smuzhiyun #define VP4_CMD 0xFE900048 424*4882a593Smuzhiyun #define VP4_ME_TH1 0xFE90004C 425*4882a593Smuzhiyun #define VP4_ME_TH2 0xFE900050 426*4882a593Smuzhiyun #define VP4_ME_COSTMB 0xFE900054 427*4882a593Smuzhiyun #define VP4_ME_SKIP 0xFE900058 428*4882a593Smuzhiyun #define VP4_ME_CTRL 0xFE90005C 429*4882a593Smuzhiyun #define VP4_MBRF_CTRL 0xFE900060 430*4882a593Smuzhiyun #define VP4_MC_CTRL 0xFE900064 431*4882a593Smuzhiyun #define VP4_PRED_CTRL 0xFE900068 432*4882a593Smuzhiyun #define VP4_SLC_SIZE 0xFE90006C 433*4882a593Smuzhiyun #define VP4_VOP_MINBIT 0xFE900070 434*4882a593Smuzhiyun #define VP4_MB_MAXBIT 0xFE900074 435*4882a593Smuzhiyun #define VP4_MB_TBIT 0xFE900078 436*4882a593Smuzhiyun #define VP4_RCQNT 0xFE90007C 437*4882a593Smuzhiyun #define VP4_RCRP 0xFE900080 438*4882a593Smuzhiyun #define VP4_RCDJ 0xFE900084 439*4882a593Smuzhiyun #define VP4_RCWQ 0xFE900088 440*4882a593Smuzhiyun #define VP4_FWD_TIME 0xFE900094 441*4882a593Smuzhiyun #define VP4_BWD_TIME 0xFE900098 442*4882a593Smuzhiyun #define VP4_PST_TIME 0xFE90009C 443*4882a593Smuzhiyun #define VP4_ILTFRAME 0xFE9000A0 444*4882a593Smuzhiyun #define VP4_EC_REF 0xFE9000A4 445*4882a593Smuzhiyun #define VP4_STATUS 0xFE900100 446*4882a593Smuzhiyun #define VP4_IRQ_ENB 0xFE900104 447*4882a593Smuzhiyun #define VP4_IRQ_STA 0xFE900108 448*4882a593Smuzhiyun #define VP4_VOP_BIT 0xFE90010C 449*4882a593Smuzhiyun #define VP4_PRV_BIT 0xFE900110 450*4882a593Smuzhiyun #define VP4_SLC_MB 0xFE900114 451*4882a593Smuzhiyun #define VP4_QSUM 0xFE900118 452*4882a593Smuzhiyun #define VP4_DEC_ERR 0xFE90011C 453*4882a593Smuzhiyun #define VP4_ERR_AREA 0xFE900120 454*4882a593Smuzhiyun #define VP4_NEXT_CODE 0xFE900124 455*4882a593Smuzhiyun #define VP4_MB_ATTR 0xFE900128 456*4882a593Smuzhiyun #define VP4_DBMON 0xFE90012C 457*4882a593Smuzhiyun #define VP4_DEBUG 0xFE900130 458*4882a593Smuzhiyun #define VP4_ERR_DET 0xFE900134 459*4882a593Smuzhiyun #define VP4_CLK_STOP 0xFE900138 460*4882a593Smuzhiyun #define VP4_MB_SADA 0xFE90013C 461*4882a593Smuzhiyun #define VP4_MB_SADR 0xFE900140 462*4882a593Smuzhiyun #define VP4_MAT_RAM 0xFE901000 463*4882a593Smuzhiyun #define VP4_NC_RAM 0xFE902000 464*4882a593Smuzhiyun #define WT 0xFE9020CC 465*4882a593Smuzhiyun #define VP4_CPY_ADDR 0xFE902264 466*4882a593Smuzhiyun #define VP4_CPC_ADDR 0xFE902268 467*4882a593Smuzhiyun #define VP4_R0Y_ADDR 0xFE90226C 468*4882a593Smuzhiyun #define VP4_R0C_ADDR 0xFE902270 469*4882a593Smuzhiyun #define VP4_R1Y_ADDR 0xFE902274 470*4882a593Smuzhiyun #define VP4_R1C_ADDR 0xFE902278 471*4882a593Smuzhiyun #define VP4_R2Y_ADDR 0xFE90227C 472*4882a593Smuzhiyun #define VP4_R2C_ADDR 0xFE902280 473*4882a593Smuzhiyun #define VP4_R3Y_ADDR 0xFE902284 474*4882a593Smuzhiyun #define VP4_R3C_ADDR 0xFE902288 475*4882a593Smuzhiyun #define VP4_R4Y_ADDR 0xFE90228C 476*4882a593Smuzhiyun #define VP4_R4C_ADDR 0xFE902290 477*4882a593Smuzhiyun #define VP4_R5Y_ADDR 0xFE902294 478*4882a593Smuzhiyun #define VP4_R5C_ADDR 0xFE902298 479*4882a593Smuzhiyun #define VP4_R6Y_ADDR 0xFE90229C 480*4882a593Smuzhiyun #define VP4_R6C_ADDR 0xFE9022A0 481*4882a593Smuzhiyun #define VP4_R7Y_ADDR 0xFE9022A4 482*4882a593Smuzhiyun #define VP4_R7C_ADDR 0xFE9022A8 483*4882a593Smuzhiyun #define VP4_R8Y_ADDR 0xFE9022AC 484*4882a593Smuzhiyun #define VP4_R8C_ADDR 0xFE9022B0 485*4882a593Smuzhiyun #define VP4_R9Y_ADDR 0xFE9022B4 486*4882a593Smuzhiyun #define VP4_R9C_ADDR 0xFE9022B8 487*4882a593Smuzhiyun #define VP4_RAY_ADDR 0xFE9022BC 488*4882a593Smuzhiyun #define VP4_RAC_ADDR 0xFE9022C0 489*4882a593Smuzhiyun #define VP4_RBY_ADDR 0xFE9022C4 490*4882a593Smuzhiyun #define VP4_RBC_ADDR 0xFE9022C8 491*4882a593Smuzhiyun #define VP4_RCY_ADDR 0xFE9022CC 492*4882a593Smuzhiyun #define VP4_RCC_ADDR 0xFE9022D0 493*4882a593Smuzhiyun #define VP4_RDY_ADDR 0xFE9022D4 494*4882a593Smuzhiyun #define VP4_RDC_ADDR 0xFE9022D8 495*4882a593Smuzhiyun #define VP4_REY_ADDR 0xFE9022DC 496*4882a593Smuzhiyun #define VP4_REC_ADDR 0xFE9022E0 497*4882a593Smuzhiyun #define VP4_RFY_ADDR 0xFE9022E4 498*4882a593Smuzhiyun #define VP4_RFC_ADDR 0xFE9022E8 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun /* VIO(CEU) */ 501*4882a593Smuzhiyun #define CAPSR 0xFE910000 502*4882a593Smuzhiyun #define CAPCR 0xFE910004 503*4882a593Smuzhiyun #define CAMCR 0xFE910008 504*4882a593Smuzhiyun #define CMCYR 0xFE91000C 505*4882a593Smuzhiyun #define CAMOR 0xFE910010 506*4882a593Smuzhiyun #define CAPWR 0xFE910014 507*4882a593Smuzhiyun #define CAIFR 0xFE910018 508*4882a593Smuzhiyun #define CSTCR 0xFE910020 509*4882a593Smuzhiyun #define CSECR 0xFE910024 510*4882a593Smuzhiyun #define CRCNTR 0xFE910028 511*4882a593Smuzhiyun #define CRCMPR 0xFE91002C 512*4882a593Smuzhiyun #define CFLCR 0xFE910030 513*4882a593Smuzhiyun #define CFSZR 0xFE910034 514*4882a593Smuzhiyun #define CDWDR 0xFE910038 515*4882a593Smuzhiyun #define CDAYR 0xFE91003C 516*4882a593Smuzhiyun #define CDACR 0xFE910040 517*4882a593Smuzhiyun #define CDBYR 0xFE910044 518*4882a593Smuzhiyun #define CDBCR 0xFE910048 519*4882a593Smuzhiyun #define CBDSR 0xFE91004C 520*4882a593Smuzhiyun #define CLFCR 0xFE910060 521*4882a593Smuzhiyun #define CDOCR 0xFE910064 522*4882a593Smuzhiyun #define CDDCR 0xFE910068 523*4882a593Smuzhiyun #define CDDAR 0xFE91006C 524*4882a593Smuzhiyun #define CEIER 0xFE910070 525*4882a593Smuzhiyun #define CETCR 0xFE910074 526*4882a593Smuzhiyun #define CSTSR 0xFE91007C 527*4882a593Smuzhiyun #define CSRTR 0xFE910080 528*4882a593Smuzhiyun #define CDAYR2 0xFE910090 529*4882a593Smuzhiyun #define CDACR2 0xFE910094 530*4882a593Smuzhiyun #define CDBYR2 0xFE910098 531*4882a593Smuzhiyun #define CDBCR2 0xFE91009C 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun /* VIO(VEU) */ 534*4882a593Smuzhiyun #define VESTR 0xFE920000 535*4882a593Smuzhiyun #define VESWR 0xFE920010 536*4882a593Smuzhiyun #define VESSR 0xFE920014 537*4882a593Smuzhiyun #define VSAYR 0xFE920018 538*4882a593Smuzhiyun #define VSACR 0xFE92001C 539*4882a593Smuzhiyun #define VBSSR 0xFE920020 540*4882a593Smuzhiyun #define VEDWR 0xFE920030 541*4882a593Smuzhiyun #define VDAYR 0xFE920034 542*4882a593Smuzhiyun #define VDACR 0xFE920038 543*4882a593Smuzhiyun #define VTRCR 0xFE920050 544*4882a593Smuzhiyun #define VRFCR 0xFE920054 545*4882a593Smuzhiyun #define VRFSR 0xFE920058 546*4882a593Smuzhiyun #define VENHR 0xFE92005C 547*4882a593Smuzhiyun #define VFMCR 0xFE920070 548*4882a593Smuzhiyun #define VVTCR 0xFE920074 549*4882a593Smuzhiyun #define VHTCR 0xFE920078 550*4882a593Smuzhiyun #define VAPCR 0xFE920080 551*4882a593Smuzhiyun #define VECCR 0xFE920084 552*4882a593Smuzhiyun #define VAFXR 0xFE920090 553*4882a593Smuzhiyun #define VSWPR 0xFE920094 554*4882a593Smuzhiyun #define VEIER 0xFE9200A0 555*4882a593Smuzhiyun #define VEVTR 0xFE9200A4 556*4882a593Smuzhiyun #define VSTAR 0xFE9200B0 557*4882a593Smuzhiyun #define VBSRR 0xFE9200B4 558*4882a593Smuzhiyun 559*4882a593Smuzhiyun /* VIO(BEU) */ 560*4882a593Smuzhiyun #define BESTR 0xFE930000 561*4882a593Smuzhiyun #define BSMWR1 0xFE930010 562*4882a593Smuzhiyun #define BSSZR1 0xFE930014 563*4882a593Smuzhiyun #define BSAYR1 0xFE930018 564*4882a593Smuzhiyun #define BSACR1 0xFE93001C 565*4882a593Smuzhiyun #define BSAAR1 0xFE930020 566*4882a593Smuzhiyun #define BSIFR1 0xFE930024 567*4882a593Smuzhiyun #define BSMWR2 0xFE930028 568*4882a593Smuzhiyun #define BSSZR2 0xFE93002C 569*4882a593Smuzhiyun #define BSAYR2 0xFE930030 570*4882a593Smuzhiyun #define BSACR2 0xFE930034 571*4882a593Smuzhiyun #define BSAAR2 0xFE930038 572*4882a593Smuzhiyun #define BSIFR2 0xFE93003C 573*4882a593Smuzhiyun #define BSMWR3 0xFE930040 574*4882a593Smuzhiyun #define BSSZR3 0xFE930044 575*4882a593Smuzhiyun #define BSAYR3 0xFE930048 576*4882a593Smuzhiyun #define BSACR3 0xFE93004C 577*4882a593Smuzhiyun #define BSAAR3 0xFE930050 578*4882a593Smuzhiyun #define BSIFR3 0xFE930054 579*4882a593Smuzhiyun #define BTPSR 0xFE930058 580*4882a593Smuzhiyun #define BMSMWR1 0xFE930070 581*4882a593Smuzhiyun #define BMSSZR1 0xFE930074 582*4882a593Smuzhiyun #define BMSAYR1 0xFE930078 583*4882a593Smuzhiyun #define BMSACR1 0xFE93007C 584*4882a593Smuzhiyun #define BMSMWR2 0xFE930080 585*4882a593Smuzhiyun #define BMSSZR2 0xFE930084 586*4882a593Smuzhiyun #define BMSAYR2 0xFE930088 587*4882a593Smuzhiyun #define BMSACR2 0xFE93008C 588*4882a593Smuzhiyun #define BMSMWR3 0xFE930090 589*4882a593Smuzhiyun #define BMSSZR3 0xFE930094 590*4882a593Smuzhiyun #define BMSAYR3 0xFE930098 591*4882a593Smuzhiyun #define BMSACR3 0xFE93009C 592*4882a593Smuzhiyun #define BMSMWR4 0xFE9300A0 593*4882a593Smuzhiyun #define BMSSZR4 0xFE9300A4 594*4882a593Smuzhiyun #define BMSAYR4 0xFE9300A8 595*4882a593Smuzhiyun #define BMSACR4 0xFE9300AC 596*4882a593Smuzhiyun #define BMSIFR 0xFE9300F0 597*4882a593Smuzhiyun #define BBLCR0 0xFE930100 598*4882a593Smuzhiyun #define BBLCR1 0xFE930104 599*4882a593Smuzhiyun #define BPROCR 0xFE930108 600*4882a593Smuzhiyun #define BMWCR0 0xFE93010C 601*4882a593Smuzhiyun #define BLOCR1 0xFE930114 602*4882a593Smuzhiyun #define BLOCR2 0xFE930118 603*4882a593Smuzhiyun #define BLOCR3 0xFE93011C 604*4882a593Smuzhiyun #define BMLOCR1 0xFE930120 605*4882a593Smuzhiyun #define BMLOCR2 0xFE930124 606*4882a593Smuzhiyun #define BMLOCR3 0xFE930128 607*4882a593Smuzhiyun #define BMLOCR4 0xFE93012C 608*4882a593Smuzhiyun #define BMPCCR1 0xFE930130 609*4882a593Smuzhiyun #define BMPCCR2 0xFE930134 610*4882a593Smuzhiyun #define BPKFR 0xFE930140 611*4882a593Smuzhiyun #define BPCCR0 0xFE930144 612*4882a593Smuzhiyun #define BPCCR11 0xFE930148 613*4882a593Smuzhiyun #define BPCCR12 0xFE93014C 614*4882a593Smuzhiyun #define BPCCR21 0xFE930150 615*4882a593Smuzhiyun #define BPCCR22 0xFE930154 616*4882a593Smuzhiyun #define BPCCR31 0xFE930158 617*4882a593Smuzhiyun #define BPCCR32 0xFE93015C 618*4882a593Smuzhiyun #define BDMWR 0xFE930160 619*4882a593Smuzhiyun #define BDAYR 0xFE930164 620*4882a593Smuzhiyun #define BDACR 0xFE930168 621*4882a593Smuzhiyun #define BAFXR 0xFE930180 622*4882a593Smuzhiyun #define BSWPR 0xFE930184 623*4882a593Smuzhiyun #define BEIER 0xFE930188 624*4882a593Smuzhiyun #define BEVTR 0xFE93018C 625*4882a593Smuzhiyun #define BRCNTR 0xFE930194 626*4882a593Smuzhiyun #define BSTAR 0xFE930198 627*4882a593Smuzhiyun #define BBRSTR 0xFE93019C 628*4882a593Smuzhiyun #define BRCHR 0xFE9301A0 629*4882a593Smuzhiyun #define CLUT 0xFE933000 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun /* JPU */ 632*4882a593Smuzhiyun #define JCMOD 0xFEA00000 633*4882a593Smuzhiyun #define JCCMD 0xFEA00004 634*4882a593Smuzhiyun #define JCSTS 0xFEA00008 635*4882a593Smuzhiyun #define JCQTN 0xFEA0000C 636*4882a593Smuzhiyun #define JCHTN 0xFEA00010 637*4882a593Smuzhiyun #define JCDRIU 0xFEA00014 638*4882a593Smuzhiyun #define JCDRID 0xFEA00018 639*4882a593Smuzhiyun #define JCVSZU 0xFEA0001C 640*4882a593Smuzhiyun #define JCVSZD 0xFEA00020 641*4882a593Smuzhiyun #define JCHSZU 0xFEA00024 642*4882a593Smuzhiyun #define JCHSZD 0xFEA00028 643*4882a593Smuzhiyun #define JCDTCU 0xFEA0002C 644*4882a593Smuzhiyun #define JCDTCM 0xFEA00030 645*4882a593Smuzhiyun #define JCDTCD 0xFEA00034 646*4882a593Smuzhiyun #define JINTE 0xFEA00038 647*4882a593Smuzhiyun #define JINTS 0xFEA0003C 648*4882a593Smuzhiyun #define JCDERR 0xFEA00040 649*4882a593Smuzhiyun #define JCRST 0xFEA00044 650*4882a593Smuzhiyun #define JIFCNT 0xFEA00060 651*4882a593Smuzhiyun #define JIFECNT 0xFEA00070 652*4882a593Smuzhiyun #define JIFESYA1 0xFEA00074 653*4882a593Smuzhiyun #define JIFESCA1 0xFEA00078 654*4882a593Smuzhiyun #define JIFESYA2 0xFEA0007C 655*4882a593Smuzhiyun #define JIFESCA2 0xFEA00080 656*4882a593Smuzhiyun #define JIFESMW 0xFEA00084 657*4882a593Smuzhiyun #define JIFESVSZ 0xFEA00088 658*4882a593Smuzhiyun #define JIFESHSZ 0xFEA0008C 659*4882a593Smuzhiyun #define JIFEDA1 0xFEA00090 660*4882a593Smuzhiyun #define JIFEDA2 0xFEA00094 661*4882a593Smuzhiyun #define JIFEDRSZ 0xFEA00098 662*4882a593Smuzhiyun #define JIFDCNT 0xFEA000A0 663*4882a593Smuzhiyun #define JIFDSA1 0xFEA000A4 664*4882a593Smuzhiyun #define JIFDSA2 0xFEA000A8 665*4882a593Smuzhiyun #define JIFDDRSZ 0xFEA000AC 666*4882a593Smuzhiyun #define JIFDDMW 0xFEA000B0 667*4882a593Smuzhiyun #define JIFDDVSZ 0xFEA000B4 668*4882a593Smuzhiyun #define JIFDDHSZ 0xFEA000B8 669*4882a593Smuzhiyun #define JIFDDYA1 0xFEA000BC 670*4882a593Smuzhiyun #define JIFDDCA1 0xFEA000C0 671*4882a593Smuzhiyun #define JIFDDYA2 0xFEA000C4 672*4882a593Smuzhiyun #define JIFDDCA2 0xFEA000C8 673*4882a593Smuzhiyun #define JCQTBL0 0xFEA10000 674*4882a593Smuzhiyun #define JCQTBL1 0xFEA10040 675*4882a593Smuzhiyun #define JCQTBL2 0xFEA10080 676*4882a593Smuzhiyun #define JCQTBL3 0xFEA100C0 677*4882a593Smuzhiyun #define JCHTBD0 0xFEA10100 678*4882a593Smuzhiyun #define JCHTBA0 0xFEA10120 679*4882a593Smuzhiyun #define JCHTBD1 0xFEA10200 680*4882a593Smuzhiyun #define JCHTBA1 0xFEA10220 681*4882a593Smuzhiyun 682*4882a593Smuzhiyun /* LCDC */ 683*4882a593Smuzhiyun #define MLDDCKPAT1R 0xFE940400 684*4882a593Smuzhiyun #define MLDDCKPAT2R 0xFE940404 685*4882a593Smuzhiyun #define SLDDCKPAT1R 0xFE940408 686*4882a593Smuzhiyun #define SLDDCKPAT2R 0xFE94040C 687*4882a593Smuzhiyun #define LDDCKR 0xFE940410 688*4882a593Smuzhiyun #define LDDCKSTPR 0xFE940414 689*4882a593Smuzhiyun #define MLDMT1R 0xFE940418 690*4882a593Smuzhiyun #define MLDMT2R 0xFE94041C 691*4882a593Smuzhiyun #define MLDMT3R 0xFE940420 692*4882a593Smuzhiyun #define MLDDFR 0xFE940424 693*4882a593Smuzhiyun #define MLDSM1R 0xFE940428 694*4882a593Smuzhiyun #define MLDSM2R 0xFE94042C 695*4882a593Smuzhiyun #define MLDSA1R 0xFE940430 696*4882a593Smuzhiyun #define MLDSA2R 0xFE940434 697*4882a593Smuzhiyun #define MLDMLSR 0xFE940438 698*4882a593Smuzhiyun #define MLDWBFR 0xFE94043C 699*4882a593Smuzhiyun #define MLDWBCNTR 0xFE940440 700*4882a593Smuzhiyun #define MLDWBAR 0xFE940444 701*4882a593Smuzhiyun #define MLDHCNR 0xFE940448 702*4882a593Smuzhiyun #define MLDHSYNR 0xFE94044C 703*4882a593Smuzhiyun #define MLDVLNR 0xFE940450 704*4882a593Smuzhiyun #define MLDVSYNR 0xFE940454 705*4882a593Smuzhiyun #define MLDHPDR 0xFE940458 706*4882a593Smuzhiyun #define MLDVPDR 0xFE94045C 707*4882a593Smuzhiyun #define MLDPMR 0xFE940460 708*4882a593Smuzhiyun #define LDPALCR 0xFE940464 709*4882a593Smuzhiyun #define LDINTR 0xFE940468 710*4882a593Smuzhiyun #define LDSR 0xFE94046C 711*4882a593Smuzhiyun #define LDCNT1R 0xFE940470 712*4882a593Smuzhiyun #define LDCNT2R 0xFE940474 713*4882a593Smuzhiyun #define LDRCNTR 0xFE940478 714*4882a593Smuzhiyun #define LDDDSR 0xFE94047C 715*4882a593Smuzhiyun #define LDRCR 0xFE940484 716*4882a593Smuzhiyun #define LDCMRKRGBR 0xFE9404C4 717*4882a593Smuzhiyun #define LDCMRKCMYR 0xFE9404C8 718*4882a593Smuzhiyun #define LDCMRK1R 0xFE9404CC 719*4882a593Smuzhiyun #define LDCMRK2R 0xFE9404D0 720*4882a593Smuzhiyun #define LDCMGKRGBR 0xFE9404D4 721*4882a593Smuzhiyun #define LDCMGKCMYR 0xFE9404D8 722*4882a593Smuzhiyun #define LDCMGK1R 0xFE9404DC 723*4882a593Smuzhiyun #define LDCMGK2R 0xFE9404E0 724*4882a593Smuzhiyun #define LDCMBKRGBR 0xFE9404E4 725*4882a593Smuzhiyun #define LDCMBKCMYR 0xFE9404E8 726*4882a593Smuzhiyun #define LDCMBK1R 0xFE9404EC 727*4882a593Smuzhiyun #define LDCMBK2R 0xFE9404F0 728*4882a593Smuzhiyun #define LDCMHKPR 0xFE9404F4 729*4882a593Smuzhiyun #define LDCMHKQR 0xFE9404F8 730*4882a593Smuzhiyun #define LDCMSELR 0xFE9404FC 731*4882a593Smuzhiyun #define LDCMTVR 0xFE940500 732*4882a593Smuzhiyun #define LDCMTVSELR 0xFE940504 733*4882a593Smuzhiyun #define LDCMDTHR 0xFE940508 734*4882a593Smuzhiyun #define LDCMCNTR 0xFE94050C 735*4882a593Smuzhiyun #define SLDMT1R 0xFE940600 736*4882a593Smuzhiyun #define SLDMT2R 0xFE940604 737*4882a593Smuzhiyun #define SLDMT3R 0xFE940608 738*4882a593Smuzhiyun #define SLDDFR 0xFE94060C 739*4882a593Smuzhiyun #define SLDSM1R 0xFE940610 740*4882a593Smuzhiyun #define SLDSM2R 0xFE940614 741*4882a593Smuzhiyun #define SLDSA1R 0xFE940618 742*4882a593Smuzhiyun #define SLDSA2R 0xFE94061C 743*4882a593Smuzhiyun #define SLDMLSR 0xFE940620 744*4882a593Smuzhiyun #define SLDHCNR 0xFE940624 745*4882a593Smuzhiyun #define SLDHSYNR 0xFE940628 746*4882a593Smuzhiyun #define SLDVLNR 0xFE94062C 747*4882a593Smuzhiyun #define SLDVSYNR 0xFE940630 748*4882a593Smuzhiyun #define SLDHPDR 0xFE940634 749*4882a593Smuzhiyun #define SLDVPDR 0xFE940638 750*4882a593Smuzhiyun #define SLDPMR 0xFE94063C 751*4882a593Smuzhiyun #define LDDWD0R 0xFE940800 752*4882a593Smuzhiyun #define LDDWD1R 0xFE940804 753*4882a593Smuzhiyun #define LDDWD2R 0xFE940808 754*4882a593Smuzhiyun #define LDDWD3R 0xFE94080C 755*4882a593Smuzhiyun #define LDDWD4R 0xFE940810 756*4882a593Smuzhiyun #define LDDWD5R 0xFE940814 757*4882a593Smuzhiyun #define LDDWD6R 0xFE940818 758*4882a593Smuzhiyun #define LDDWD7R 0xFE94081C 759*4882a593Smuzhiyun #define LDDWD8R 0xFE940820 760*4882a593Smuzhiyun #define LDDWD9R 0xFE940824 761*4882a593Smuzhiyun #define LDDWDAR 0xFE940828 762*4882a593Smuzhiyun #define LDDWDBR 0xFE94082C 763*4882a593Smuzhiyun #define LDDWDCR 0xFE940830 764*4882a593Smuzhiyun #define LDDWDDR 0xFE940834 765*4882a593Smuzhiyun #define LDDWDER 0xFE940838 766*4882a593Smuzhiyun #define LDDWDFR 0xFE94083C 767*4882a593Smuzhiyun #define LDDRDR 0xFE940840 768*4882a593Smuzhiyun #define LDDWAR 0xFE940900 769*4882a593Smuzhiyun #define LDDRAR 0xFE940904 770*4882a593Smuzhiyun #define LDPR00 0xFE940000 771*4882a593Smuzhiyun 772*4882a593Smuzhiyun /* VOU */ 773*4882a593Smuzhiyun #define VOUER 0xFE960000 774*4882a593Smuzhiyun #define VOUCR 0xFE960004 775*4882a593Smuzhiyun #define VOUSTR 0xFE960008 776*4882a593Smuzhiyun #define VOUVCR 0xFE96000C 777*4882a593Smuzhiyun #define VOUISR 0xFE960010 778*4882a593Smuzhiyun #define VOUBCR 0xFE960014 779*4882a593Smuzhiyun #define VOUDPR 0xFE960018 780*4882a593Smuzhiyun #define VOUDSR 0xFE96001C 781*4882a593Smuzhiyun #define VOUVPR 0xFE960020 782*4882a593Smuzhiyun #define VOUIR 0xFE960024 783*4882a593Smuzhiyun #define VOUSRR 0xFE960028 784*4882a593Smuzhiyun #define VOUMSR 0xFE96002C 785*4882a593Smuzhiyun #define VOUHIR 0xFE960030 786*4882a593Smuzhiyun #define VOUDFR 0xFE960034 787*4882a593Smuzhiyun #define VOUAD1R 0xFE960038 788*4882a593Smuzhiyun #define VOUAD2R 0xFE96003C 789*4882a593Smuzhiyun #define VOUAIR 0xFE960040 790*4882a593Smuzhiyun #define VOUSWR 0xFE960044 791*4882a593Smuzhiyun #define VOURCR 0xFE960048 792*4882a593Smuzhiyun #define VOURPR 0xFE960050 793*4882a593Smuzhiyun 794*4882a593Smuzhiyun /* TSIF */ 795*4882a593Smuzhiyun #define TSCTLR 0xA4C80000 796*4882a593Smuzhiyun #define TSPIDR 0xA4C80004 797*4882a593Smuzhiyun #define TSCMDR 0xA4C80008 798*4882a593Smuzhiyun #define TSSTR 0xA4C8000C 799*4882a593Smuzhiyun #define TSTSDR 0xA4C80010 800*4882a593Smuzhiyun #define TSBUFCLRR 0xA4C80014 801*4882a593Smuzhiyun #define TSINTER 0xA4C80018 802*4882a593Smuzhiyun #define TSPSCALER 0xA4C80020 803*4882a593Smuzhiyun #define TSPSCALERR 0xA4C80024 804*4882a593Smuzhiyun #define TSPCRADCMDR 0xA4C80028 805*4882a593Smuzhiyun #define TSPCRADCR 0xA4C8002C 806*4882a593Smuzhiyun #define TSTRPCRADCR 0xA4C80030 807*4882a593Smuzhiyun #define TSDPCRADCR 0xA4C80034 808*4882a593Smuzhiyun 809*4882a593Smuzhiyun /* SIU */ 810*4882a593Smuzhiyun #define IFCTL 0xA454C000 811*4882a593Smuzhiyun #define SRCTL 0xA454C004 812*4882a593Smuzhiyun #define SFORM 0xA454C008 813*4882a593Smuzhiyun #define CKCTL 0xA454C00C 814*4882a593Smuzhiyun #define TRDAT 0xA454C010 815*4882a593Smuzhiyun #define STFIFO 0xA454C014 816*4882a593Smuzhiyun #define DPAK 0xA454C01C 817*4882a593Smuzhiyun #define CKREV 0xA454C020 818*4882a593Smuzhiyun #define EVNTC 0xA454C028 819*4882a593Smuzhiyun #define SBCTL 0xA454C040 820*4882a593Smuzhiyun #define SBPSET 0xA454C044 821*4882a593Smuzhiyun #define SBBUS 0xA454C048 822*4882a593Smuzhiyun #define SBWFLG 0xA454C058 823*4882a593Smuzhiyun #define SBRFLG 0xA454C05C 824*4882a593Smuzhiyun #define SBWDAT 0xA454C060 825*4882a593Smuzhiyun #define SBRDAT 0xA454C064 826*4882a593Smuzhiyun #define SBFSTS 0xA454C068 827*4882a593Smuzhiyun #define SBDVCA 0xA454C06C 828*4882a593Smuzhiyun #define SBDVCB 0xA454C070 829*4882a593Smuzhiyun #define SBACTIV 0xA454C074 830*4882a593Smuzhiyun #define DMAIA 0xA454C090 831*4882a593Smuzhiyun #define DMAIB 0xA454C094 832*4882a593Smuzhiyun #define DMAOA 0xA454C098 833*4882a593Smuzhiyun #define DMAOB 0xA454C09C 834*4882a593Smuzhiyun #define SPLRI 0xA454C0B8 835*4882a593Smuzhiyun #define SPRRI 0xA454C0BC 836*4882a593Smuzhiyun #define SPURI 0xA454C0C4 837*4882a593Smuzhiyun #define SPTIS 0xA454C0C8 838*4882a593Smuzhiyun #define SPSTS 0xA454C0CC 839*4882a593Smuzhiyun #define SPCTL 0xA454C0D0 840*4882a593Smuzhiyun #define SPIRI 0xA454C0D4 841*4882a593Smuzhiyun #define SPQCF 0xA454C0D8 842*4882a593Smuzhiyun #define SPQCS 0xA454C0DC 843*4882a593Smuzhiyun #define SPQCT 0xA454C0E0 844*4882a593Smuzhiyun #define DPEAK 0xA454C0F0 845*4882a593Smuzhiyun #define DSLPD 0xA454C0F4 846*4882a593Smuzhiyun #define DSLLV 0xA454C0F8 847*4882a593Smuzhiyun #define BRGASEL 0xA454C100 848*4882a593Smuzhiyun #define BRRA 0xA454C104 849*4882a593Smuzhiyun #define BRGBSEL 0xA454C108 850*4882a593Smuzhiyun #define BRRB 0xA454C10C 851*4882a593Smuzhiyun 852*4882a593Smuzhiyun /* USB */ 853*4882a593Smuzhiyun #define IFR0 0xA4480000 854*4882a593Smuzhiyun #define ISR0 0xA4480010 855*4882a593Smuzhiyun #define IER0 0xA4480020 856*4882a593Smuzhiyun #define EPDR0I 0xA4480030 857*4882a593Smuzhiyun #define EPDR0O 0xA4480034 858*4882a593Smuzhiyun #define EPDR0S 0xA4480038 859*4882a593Smuzhiyun #define EPDR1 0xA448003C 860*4882a593Smuzhiyun #define EPDR2 0xA4480040 861*4882a593Smuzhiyun #define EPDR3 0xA4480044 862*4882a593Smuzhiyun #define EPDR4 0xA4480048 863*4882a593Smuzhiyun #define EPDR5 0xA448004C 864*4882a593Smuzhiyun #define EPDR6 0xA4480050 865*4882a593Smuzhiyun #define EPDR7 0xA4480054 866*4882a593Smuzhiyun #define EPDR8 0xA4480058 867*4882a593Smuzhiyun #define EPDR9 0xA448005C 868*4882a593Smuzhiyun #define EPSZ0O 0xA4480080 869*4882a593Smuzhiyun #define EPSZ3 0xA4480084 870*4882a593Smuzhiyun #define EPSZ6 0xA4480088 871*4882a593Smuzhiyun #define EPSZ9 0xA448008C 872*4882a593Smuzhiyun #define TRG 0xA44800A0 873*4882a593Smuzhiyun #define DASTS 0xA44800A4 874*4882a593Smuzhiyun #define FCLR 0xA44800AA 875*4882a593Smuzhiyun #define DMA 0xA44800AC 876*4882a593Smuzhiyun #define EPSTL 0xA44800B2 877*4882a593Smuzhiyun #define CVR 0xA44800B4 878*4882a593Smuzhiyun #define TSR 0xA44800B8 879*4882a593Smuzhiyun #define CTLR 0xA44800BC 880*4882a593Smuzhiyun #define EPIR 0xA44800C0 881*4882a593Smuzhiyun #define XVERCR 0xA44800D0 882*4882a593Smuzhiyun #define STLMR 0xA44800D4 883*4882a593Smuzhiyun 884*4882a593Smuzhiyun /* KEYSC */ 885*4882a593Smuzhiyun #define KYCR1 0xA44B0000 886*4882a593Smuzhiyun #define KYCR2 0xA44B0004 887*4882a593Smuzhiyun #define KYINDR 0xA44B0008 888*4882a593Smuzhiyun #define KYOUTDR 0xA44B000C 889*4882a593Smuzhiyun 890*4882a593Smuzhiyun /* MMCIF */ 891*4882a593Smuzhiyun #define CMDR0 0xA4448000 892*4882a593Smuzhiyun #define CMDR1 0xA4448001 893*4882a593Smuzhiyun #define CMDR2 0xA4448002 894*4882a593Smuzhiyun #define CMDR3 0xA4448003 895*4882a593Smuzhiyun #define CMDR4 0xA4448004 896*4882a593Smuzhiyun #define CMDR5 0xA4448005 897*4882a593Smuzhiyun #define CMDSTRT 0xA4448006 898*4882a593Smuzhiyun #define OPCR 0xA444800A 899*4882a593Smuzhiyun #define CSTR 0xA444800B 900*4882a593Smuzhiyun #define INTCR0 0xA444800C 901*4882a593Smuzhiyun #define INTCR1 0xA444800D 902*4882a593Smuzhiyun #define INTSTR0 0xA444800E 903*4882a593Smuzhiyun #define INTSTR1 0xA444800F 904*4882a593Smuzhiyun #define CLKON 0xA4448010 905*4882a593Smuzhiyun #define CTOCR 0xA4448011 906*4882a593Smuzhiyun #define VDCNT 0xA4448012 907*4882a593Smuzhiyun #define TBCR 0xA4448014 908*4882a593Smuzhiyun #define MODER 0xA4448016 909*4882a593Smuzhiyun #define CMDTYR 0xA4448018 910*4882a593Smuzhiyun #define RSPTYR 0xA4448019 911*4882a593Smuzhiyun #define TBNCR 0xA444801A 912*4882a593Smuzhiyun #define RSPR0 0xA4448020 913*4882a593Smuzhiyun #define RSPR1 0xA4448021 914*4882a593Smuzhiyun #define RSPR2 0xA4448022 915*4882a593Smuzhiyun #define RSPR3 0xA4448023 916*4882a593Smuzhiyun #define RSPR4 0xA4448024 917*4882a593Smuzhiyun #define RSPR5 0xA4448025 918*4882a593Smuzhiyun #define RSPR6 0xA4448026 919*4882a593Smuzhiyun #define RSPR7 0xA4448027 920*4882a593Smuzhiyun #define RSPR8 0xA4448028 921*4882a593Smuzhiyun #define RSPR9 0xA4448029 922*4882a593Smuzhiyun #define RSPR10 0xA444802A 923*4882a593Smuzhiyun #define RSPR11 0xA444802B 924*4882a593Smuzhiyun #define RSPR12 0xA444802C 925*4882a593Smuzhiyun #define RSPR13 0xA444802D 926*4882a593Smuzhiyun #define RSPR14 0xA444802E 927*4882a593Smuzhiyun #define RSPR15 0xA444802F 928*4882a593Smuzhiyun #define RSPR16 0xA4448030 929*4882a593Smuzhiyun #define RSPRD 0xA4448031 930*4882a593Smuzhiyun #define DTOUTR 0xA4448032 931*4882a593Smuzhiyun #define DR 0xA4448040 932*4882a593Smuzhiyun #define FIFOCLR 0xA4448042 933*4882a593Smuzhiyun #define DMACR 0xA4448044 934*4882a593Smuzhiyun #define INTCR2 0xA4448046 935*4882a593Smuzhiyun #define INTSTR2 0xA4448048 936*4882a593Smuzhiyun 937*4882a593Smuzhiyun /* Z3D3 */ 938*4882a593Smuzhiyun #define DLBI 0xFD980000 939*4882a593Smuzhiyun #define DLBD0 0xFD980080 940*4882a593Smuzhiyun #define DLBD1 0xFD980100 941*4882a593Smuzhiyun #define GEWM 0xFD984000 942*4882a593Smuzhiyun #define ICD0 0xFD988000 943*4882a593Smuzhiyun #define ICD1 0xFD989000 944*4882a593Smuzhiyun #define ICT 0xFD98A000 945*4882a593Smuzhiyun #define ILM 0xFD98C000 946*4882a593Smuzhiyun #define FLM0 0xFD98C800 947*4882a593Smuzhiyun #define FLM1 0xFD98D000 948*4882a593Smuzhiyun #define FLUT 0xFD98D800 949*4882a593Smuzhiyun #define Z3D_PC 0xFD98E400 950*4882a593Smuzhiyun #define Z3D_PCSP 0xFD98E404 951*4882a593Smuzhiyun #define Z3D_PAR 0xFD98E408 952*4882a593Smuzhiyun #define Z3D_IMADR 0xFD98E40C 953*4882a593Smuzhiyun #define Z3D_BTR0 0xFD98E410 954*4882a593Smuzhiyun #define Z3D_BTR1 0xFD98E414 955*4882a593Smuzhiyun #define Z3D_BTR2 0xFD98E418 956*4882a593Smuzhiyun #define Z3D_BTR3 0xFD98E41C 957*4882a593Smuzhiyun #define Z3D_LC0 0xFD98E420 958*4882a593Smuzhiyun #define Z3D_LC1 0xFD98E424 959*4882a593Smuzhiyun #define Z3D_LC2 0xFD98E428 960*4882a593Smuzhiyun #define Z3D_LC3 0xFD98E42C 961*4882a593Smuzhiyun #define Z3D_FR0 0xFD98E430 962*4882a593Smuzhiyun #define Z3D_FR1 0xFD98E434 963*4882a593Smuzhiyun #define Z3D_FR2 0xFD98E438 964*4882a593Smuzhiyun #define Z3D_SR 0xFD98E440 965*4882a593Smuzhiyun #define Z3D_SMDR 0xFD98E444 966*4882a593Smuzhiyun #define Z3D_PBIR 0xFD98E448 967*4882a593Smuzhiyun #define Z3D_DMDR 0xFD98E44C 968*4882a593Smuzhiyun #define Z3D_IREG 0xFD98E460 969*4882a593Smuzhiyun #define Z3D_AR00 0xFD98E480 970*4882a593Smuzhiyun #define Z3D_AR01 0xFD98E484 971*4882a593Smuzhiyun #define Z3D_AR02 0xFD98E488 972*4882a593Smuzhiyun #define Z3D_AR03 0xFD98E48C 973*4882a593Smuzhiyun #define Z3D_BR00 0xFD98E490 974*4882a593Smuzhiyun #define Z3D_BR01 0xFD98E494 975*4882a593Smuzhiyun #define Z3D_IXR00 0xFD98E4A0 976*4882a593Smuzhiyun #define Z3D_IXR01 0xFD98E4A4 977*4882a593Smuzhiyun #define Z3D_IXR02 0xFD98E4A8 978*4882a593Smuzhiyun #define Z3D_IXR03 0xFD98E4AC 979*4882a593Smuzhiyun #define Z3D_AR10 0xFD98E4C0 980*4882a593Smuzhiyun #define Z3D_AR11 0xFD98E4C4 981*4882a593Smuzhiyun #define Z3D_AR12 0xFD98E4C8 982*4882a593Smuzhiyun #define Z3D_AR13 0xFD98E4CC 983*4882a593Smuzhiyun #define Z3D_BR10 0xFD98E4D0 984*4882a593Smuzhiyun #define Z3D_BR11 0xFD98E4D4 985*4882a593Smuzhiyun #define Z3D_IXR10 0xFD98E4E0 986*4882a593Smuzhiyun #define Z3D_IXR11 0xFD98E4E4 987*4882a593Smuzhiyun #define Z3D_IXR12 0xFD98E4E8 988*4882a593Smuzhiyun #define Z3D_IXR13 0xFD98E4EC 989*4882a593Smuzhiyun #define Z3D_AR20 0xFD98E500 990*4882a593Smuzhiyun #define Z3D_AR21 0xFD98E504 991*4882a593Smuzhiyun #define Z3D_AR22 0xFD98E508 992*4882a593Smuzhiyun #define Z3D_AR23 0xFD98E50C 993*4882a593Smuzhiyun #define Z3D_BR20 0xFD98E510 994*4882a593Smuzhiyun #define Z3D_BR21 0xFD98E514 995*4882a593Smuzhiyun #define Z3D_IXR20 0xFD98E520 996*4882a593Smuzhiyun #define Z3D_IXR21 0xFD98E524 997*4882a593Smuzhiyun #define Z3D_IXR22 0xFD98E528 998*4882a593Smuzhiyun #define Z3D_IXR23 0xFD98E52C 999*4882a593Smuzhiyun #define Z3D_MR0 0xFD98E540 1000*4882a593Smuzhiyun #define Z3D_MR1 0xFD98E544 1001*4882a593Smuzhiyun #define Z3D_MR2 0xFD98E548 1002*4882a593Smuzhiyun #define Z3D_MR3 0xFD98E54C 1003*4882a593Smuzhiyun #define Z3D_WORKRST 0xFD98E558 1004*4882a593Smuzhiyun #define Z3D_WORKWST 0xFD98E55C 1005*4882a593Smuzhiyun #define Z3D_DBADR 0xFD98E560 1006*4882a593Smuzhiyun #define Z3D_DLBPRST 0xFD98E564 1007*4882a593Smuzhiyun #define Z3D_DLBRST 0xFD98E568 1008*4882a593Smuzhiyun #define Z3D_DLBWST 0xFD98E56C 1009*4882a593Smuzhiyun #define Z3D_UDR0 0xFD98E570 1010*4882a593Smuzhiyun #define Z3D_UDR1 0xFD98E574 1011*4882a593Smuzhiyun #define Z3D_UDR2 0xFD98E578 1012*4882a593Smuzhiyun #define Z3D_UDR3 0xFD98E57C 1013*4882a593Smuzhiyun #define Z3D_CCR0 0xFD98E580 1014*4882a593Smuzhiyun #define Z3D_CCR1 0xFD98E584 1015*4882a593Smuzhiyun #define Z3D_EXPR 0xFD98E588 1016*4882a593Smuzhiyun #define Z3D_V0_X 0xFD9A0000 1017*4882a593Smuzhiyun #define Z3D_V0_Y 0xFD9A0004 1018*4882a593Smuzhiyun #define Z3D_V0_Z 0xFD9A0008 1019*4882a593Smuzhiyun #define Z3D_V0_W 0xFD9A000C 1020*4882a593Smuzhiyun #define Z3D_V0_A 0xFD9A0010 1021*4882a593Smuzhiyun #define Z3D_V0_R 0xFD9A0014 1022*4882a593Smuzhiyun #define Z3D_V0_G 0xFD9A0018 1023*4882a593Smuzhiyun #define Z3D_V0_B 0xFD9A001C 1024*4882a593Smuzhiyun #define Z3D_V0_F 0xFD9A0020 1025*4882a593Smuzhiyun #define Z3D_V0_SR 0xFD9A0024 1026*4882a593Smuzhiyun #define Z3D_V0_SG 0xFD9A0028 1027*4882a593Smuzhiyun #define Z3D_V0_SB 0xFD9A002C 1028*4882a593Smuzhiyun #define Z3D_V0_U0 0xFD9A0030 1029*4882a593Smuzhiyun #define Z3D_V0_V0 0xFD9A0034 1030*4882a593Smuzhiyun #define Z3D_V0_U1 0xFD9A0038 1031*4882a593Smuzhiyun #define Z3D_V0_V1 0xFD9A003C 1032*4882a593Smuzhiyun #define Z3D_V1_X 0xFD9A0080 1033*4882a593Smuzhiyun #define Z3D_V1_Y 0xFD9A0084 1034*4882a593Smuzhiyun #define Z3D_V1_Z 0xFD9A0088 1035*4882a593Smuzhiyun #define Z3D_V1_W 0xFD9A008C 1036*4882a593Smuzhiyun #define Z3D_V1_A 0xFD9A0090 1037*4882a593Smuzhiyun #define Z3D_V1_R 0xFD9A0094 1038*4882a593Smuzhiyun #define Z3D_V1_G 0xFD9A0098 1039*4882a593Smuzhiyun #define Z3D_V1_B 0xFD9A009C 1040*4882a593Smuzhiyun #define Z3D_V1_F 0xFD9A00A0 1041*4882a593Smuzhiyun #define Z3D_V1_SR 0xFD9A00A4 1042*4882a593Smuzhiyun #define Z3D_V1_SG 0xFD9A00A8 1043*4882a593Smuzhiyun #define Z3D_V1_SB 0xFD9A00AC 1044*4882a593Smuzhiyun #define Z3D_V1_U0 0xFD9A00B0 1045*4882a593Smuzhiyun #define Z3D_V1_V0 0xFD9A00B4 1046*4882a593Smuzhiyun #define Z3D_V1_U1 0xFD9A00B8 1047*4882a593Smuzhiyun #define Z3D_V1_V1 0xFD9A00BC 1048*4882a593Smuzhiyun #define Z3D_V2_X 0xFD9A0100 1049*4882a593Smuzhiyun #define Z3D_V2_Y 0xFD9A0104 1050*4882a593Smuzhiyun #define Z3D_V2_Z 0xFD9A0108 1051*4882a593Smuzhiyun #define Z3D_V2_W 0xFD9A010C 1052*4882a593Smuzhiyun #define Z3D_V2_A 0xFD9A0110 1053*4882a593Smuzhiyun #define Z3D_V2_R 0xFD9A0114 1054*4882a593Smuzhiyun #define Z3D_V2_G 0xFD9A0118 1055*4882a593Smuzhiyun #define Z3D_V2_B 0xFD9A011C 1056*4882a593Smuzhiyun #define Z3D_V2_F 0xFD9A0120 1057*4882a593Smuzhiyun #define Z3D_V2_SR 0xFD9A0124 1058*4882a593Smuzhiyun #define Z3D_V2_SG 0xFD9A0128 1059*4882a593Smuzhiyun #define Z3D_V2_SB 0xFD9A012C 1060*4882a593Smuzhiyun #define Z3D_V2_U0 0xFD9A0130 1061*4882a593Smuzhiyun #define Z3D_V2_V0 0xFD9A0134 1062*4882a593Smuzhiyun #define Z3D_V2_U1 0xFD9A0138 1063*4882a593Smuzhiyun #define Z3D_V2_V1 0xFD9A013C 1064*4882a593Smuzhiyun #define Z3D_RENDER 0xFD9A0180 1065*4882a593Smuzhiyun #define Z3D_POLYGON_OFFSET 0xFD9A0184 1066*4882a593Smuzhiyun #define Z3D_VERTEX_CONTROL 0xFD9A0200 1067*4882a593Smuzhiyun #define Z3D_STATE_MODE 0xFD9A0204 1068*4882a593Smuzhiyun #define Z3D_FPU_MODE 0xFD9A0318 1069*4882a593Smuzhiyun #define Z3D_SCISSOR_MIN 0xFD9A0400 1070*4882a593Smuzhiyun #define Z3D_SCISSOR_MAX 0xFD9A0404 1071*4882a593Smuzhiyun #define Z3D_TEXTURE_MODE_A 0xFD9A0408 1072*4882a593Smuzhiyun #define Z3D_TEXTURE_MODE_B 0xFD9A040C 1073*4882a593Smuzhiyun #define Z3D_TEXTURE_BASE_HI_A 0xFD9A0418 1074*4882a593Smuzhiyun #define Z3D_TEXTURE_BASE_LO_A 0xFD9A041C 1075*4882a593Smuzhiyun #define Z3D_TEXTURE_BASE_HI_B 0xFD9A0420 1076*4882a593Smuzhiyun #define Z3D_TEXTURE_BASE_LO_B 0xFD9A0424 1077*4882a593Smuzhiyun #define Z3D_TEXTURE_ALPHA_A0 0xFD9A0438 1078*4882a593Smuzhiyun #define Z3D_TEXTURE_ALPHA_A1 0xFD9A043C 1079*4882a593Smuzhiyun #define Z3D_TEXTURE_ALPHA_A2 0xFD9A0440 1080*4882a593Smuzhiyun #define Z3D_TEXTURE_ALPHA_A3 0xFD9A0444 1081*4882a593Smuzhiyun #define Z3D_TEXTURE_ALPHA_A4 0xFD9A0448 1082*4882a593Smuzhiyun #define Z3D_TEXTURE_ALPHA_A5 0xFD9A044C 1083*4882a593Smuzhiyun #define Z3D_TEXTURE_ALPHA_B0 0xFD9A0450 1084*4882a593Smuzhiyun #define Z3D_TEXTURE_ALPHA_B1 0xFD9A0454 1085*4882a593Smuzhiyun #define Z3D_TEXTURE_ALPHA_B2 0xFD9A0458 1086*4882a593Smuzhiyun #define Z3D_TEXTURE_ALPHA_B3 0xFD9A045C 1087*4882a593Smuzhiyun #define Z3D_TEXTURE_ALPHA_B4 0xFD9A0460 1088*4882a593Smuzhiyun #define Z3D_TEXTURE_ALPHA_B5 0xFD9A0464 1089*4882a593Smuzhiyun #define Z3D_TEXTURE_FLUSH 0xFD9A0498 1090*4882a593Smuzhiyun #define Z3D_GAMMA_TABLE0 0xFD9A049C 1091*4882a593Smuzhiyun #define Z3D_GAMMA_TABLE1 0xFD9A04A0 1092*4882a593Smuzhiyun #define Z3D_GAMMA_TABLE2 0xFD9A04A4 1093*4882a593Smuzhiyun #define Z3D_ALPHA_TEST 0xFD9A0800 1094*4882a593Smuzhiyun #define Z3D_STENCIL_TEST 0xFD9A0804 1095*4882a593Smuzhiyun #define Z3D_DEPTH_ROP_BLEND_DITHER 0xFD9A0808 1096*4882a593Smuzhiyun #define Z3D_MASK 0xFD9A080C 1097*4882a593Smuzhiyun #define Z3D_FBUS_MODE 0xFD9A0810 1098*4882a593Smuzhiyun #define Z3D_GNT_SET 0xFD9A0814 1099*4882a593Smuzhiyun #define Z3D_BETWEEN_TEST 0xFD9A0818 1100*4882a593Smuzhiyun #define Z3D_FB_BASE 0xFD9A081C 1101*4882a593Smuzhiyun #define Z3D_LCD_SIZE 0xFD9A0820 1102*4882a593Smuzhiyun #define Z3D_FB_FLUSH 0xFD9A0824 1103*4882a593Smuzhiyun #define Z3D_CACHE_INVALID 0xFD9A0828 1104*4882a593Smuzhiyun #define Z3D_SC_MODE 0xFD9A0830 1105*4882a593Smuzhiyun #define Z3D_SC0_MIN 0xFD9A0834 1106*4882a593Smuzhiyun #define Z3D_SC0_MAX 0xFD9A0838 1107*4882a593Smuzhiyun #define Z3D_SC1_MIN 0xFD9A083C 1108*4882a593Smuzhiyun #define Z3D_SC1_MAX 0xFD9A0840 1109*4882a593Smuzhiyun #define Z3D_SC2_MIN 0xFD9A0844 1110*4882a593Smuzhiyun #define Z3D_SC2_MAX 0xFD9A0848 1111*4882a593Smuzhiyun #define Z3D_SC3_MIN 0xFD9A084C 1112*4882a593Smuzhiyun #define Z3D_SC3_MAX 0xFD9A0850 1113*4882a593Smuzhiyun #define Z3D_READRESET 0xFD9A0854 1114*4882a593Smuzhiyun #define Z3D_DET_MIN 0xFD9A0858 1115*4882a593Smuzhiyun #define Z3D_DET_MAX 0xFD9A085C 1116*4882a593Smuzhiyun #define Z3D_FB_BASE_SR 0xFD9A0860 1117*4882a593Smuzhiyun #define Z3D_LCD_SIZE_SR 0xFD9A0864 1118*4882a593Smuzhiyun #define Z3D_2D_CTRL_STATUS 0xFD9A0C00 1119*4882a593Smuzhiyun #define Z3D_2D_SIZE 0xFD9A0C04 1120*4882a593Smuzhiyun #define Z3D_2D_SRCLOC 0xFD9A0C08 1121*4882a593Smuzhiyun #define Z3D_2D_DSTLOC 0xFD9A0C0C 1122*4882a593Smuzhiyun #define Z3D_2D_DMAPORT 0xFD9A0C10 1123*4882a593Smuzhiyun #define Z3D_2D_CONSTANT_SOURCE0 0xFD9A0C14 1124*4882a593Smuzhiyun #define Z3D_2D_CONSTANT_SOURCE1 0xFD9A0C18 1125*4882a593Smuzhiyun #define Z3D_2D_STPCOLOR0 0xFD9A0C1C 1126*4882a593Smuzhiyun #define Z3D_2D_STPCOLOR1 0xFD9A0C20 1127*4882a593Smuzhiyun #define Z3D_2D_STPPARAMETER_SET0 0xFD9A0C24 1128*4882a593Smuzhiyun #define Z3D_2D_STPPARAMETER_SET1 0xFD9A0C28 1129*4882a593Smuzhiyun #define Z3D_2D_STPPAT_0 0xFD9A0C40 1130*4882a593Smuzhiyun #define Z3D_2D_STPPAT_1 0xFD9A0C44 1131*4882a593Smuzhiyun #define Z3D_2D_STPPAT_2 0xFD9A0C48 1132*4882a593Smuzhiyun #define Z3D_2D_STPPAT_3 0xFD9A0C4C 1133*4882a593Smuzhiyun #define Z3D_2D_STPPAT_4 0xFD9A0C50 1134*4882a593Smuzhiyun #define Z3D_2D_STPPAT_5 0xFD9A0C54 1135*4882a593Smuzhiyun #define Z3D_2D_STPPAT_6 0xFD9A0C58 1136*4882a593Smuzhiyun #define Z3D_2D_STPPAT_7 0xFD9A0C5C 1137*4882a593Smuzhiyun #define Z3D_2D_STPPAT_8 0xFD9A0C60 1138*4882a593Smuzhiyun #define Z3D_2D_STPPAT_9 0xFD9A0C64 1139*4882a593Smuzhiyun #define Z3D_2D_STPPAT_10 0xFD9A0C68 1140*4882a593Smuzhiyun #define Z3D_2D_STPPAT_11 0xFD9A0C6C 1141*4882a593Smuzhiyun #define Z3D_2D_STPPAT_12 0xFD9A0C70 1142*4882a593Smuzhiyun #define Z3D_2D_STPPAT_13 0xFD9A0C74 1143*4882a593Smuzhiyun #define Z3D_2D_STPPAT_14 0xFD9A0C78 1144*4882a593Smuzhiyun #define Z3D_2D_STPPAT_15 0xFD9A0C7C 1145*4882a593Smuzhiyun #define Z3D_2D_STPPAT_16 0xFD9A0C80 1146*4882a593Smuzhiyun #define Z3D_2D_STPPAT_17 0xFD9A0C84 1147*4882a593Smuzhiyun #define Z3D_2D_STPPAT_18 0xFD9A0C88 1148*4882a593Smuzhiyun #define Z3D_2D_STPPAT_19 0xFD9A0C8C 1149*4882a593Smuzhiyun #define Z3D_2D_STPPAT_20 0xFD9A0C90 1150*4882a593Smuzhiyun #define Z3D_2D_STPPAT_21 0xFD9A0C94 1151*4882a593Smuzhiyun #define Z3D_2D_STPPAT_22 0xFD9A0C98 1152*4882a593Smuzhiyun #define Z3D_2D_STPPAT_23 0xFD9A0C9C 1153*4882a593Smuzhiyun #define Z3D_2D_STPPAT_24 0xFD9A0CA0 1154*4882a593Smuzhiyun #define Z3D_2D_STPPAT_25 0xFD9A0CA4 1155*4882a593Smuzhiyun #define Z3D_2D_STPPAT_26 0xFD9A0CA8 1156*4882a593Smuzhiyun #define Z3D_2D_STPPAT_27 0xFD9A0CAC 1157*4882a593Smuzhiyun #define Z3D_2D_STPPAT_28 0xFD9A0CB0 1158*4882a593Smuzhiyun #define Z3D_2D_STPPAT_29 0xFD9A0CB4 1159*4882a593Smuzhiyun #define Z3D_2D_STPPAT_30 0xFD9A0CB8 1160*4882a593Smuzhiyun #define Z3D_2D_STPPAT_31 0xFD9A0CBC 1161*4882a593Smuzhiyun #define Z3D_WR_CTRL 0xFD9A1000 1162*4882a593Smuzhiyun #define Z3D_WR_P0 0xFD9A1004 1163*4882a593Smuzhiyun #define Z3D_WR_P1 0xFD9A1008 1164*4882a593Smuzhiyun #define Z3D_WR_P2 0xFD9A100C 1165*4882a593Smuzhiyun #define Z3D_WR_FGC 0xFD9A1010 1166*4882a593Smuzhiyun #define Z3D_WR_BGC 0xFD9A1014 1167*4882a593Smuzhiyun #define Z3D_WR_SZ 0xFD9A1018 1168*4882a593Smuzhiyun #define Z3D_WR_PATPARAM 0xFD9A101C 1169*4882a593Smuzhiyun #define Z3D_WR_PAT 0xFD9A1020 1170*4882a593Smuzhiyun #define Z3D_SYS_STATUS 0xFD9A1400 1171*4882a593Smuzhiyun #define Z3D_SYS_RESET 0xFD9A1404 1172*4882a593Smuzhiyun #define Z3D_SYS_CLK 0xFD9A1408 1173*4882a593Smuzhiyun #define Z3D_SYS_CONF 0xFD9A140C 1174*4882a593Smuzhiyun #define Z3D_SYS_VERSION 0xFD9A1410 1175*4882a593Smuzhiyun #define Z3D_SYS_DBINV 0xFD9A1418 1176*4882a593Smuzhiyun #define Z3D_SYS_I2F_FMT 0xFD9A1420 1177*4882a593Smuzhiyun #define Z3D_SYS_I2F_SRC 0xFD9A1424 1178*4882a593Smuzhiyun #define Z3D_SYS_I2F_DST 0xFD9A1428 1179*4882a593Smuzhiyun #define Z3D_SYS_GBCNT 0xFD9A1430 1180*4882a593Smuzhiyun #define Z3D_SYS_BSYCNT 0xFD9A1434 1181*4882a593Smuzhiyun #define Z3D_SYS_INT_STATUS 0xFD9A1450 1182*4882a593Smuzhiyun #define Z3D_SYS_INT_MASK 0xFD9A1454 1183*4882a593Smuzhiyun #define Z3D_SYS_INT_CLEAR 0xFD9A1458 1184*4882a593Smuzhiyun #define TCD0 0xFD9C0000 1185*4882a593Smuzhiyun #define TCD1 0xFD9C0400 1186*4882a593Smuzhiyun #define TCD2 0xFD9C0800 1187*4882a593Smuzhiyun #define TCD3 0xFD9C0C00 1188*4882a593Smuzhiyun #define TCT0 0xFD9C1000 1189*4882a593Smuzhiyun #define TCT1 0xFD9C1400 1190*4882a593Smuzhiyun #define TCT2 0xFD9C1800 1191*4882a593Smuzhiyun #define TCT3 0xFD9C1C00 1192*4882a593Smuzhiyun 1193*4882a593Smuzhiyun /* PFC */ 1194*4882a593Smuzhiyun #define PACR 0xA4050100 1195*4882a593Smuzhiyun #define PBCR 0xA4050102 1196*4882a593Smuzhiyun #define PCCR 0xA4050104 1197*4882a593Smuzhiyun #define PDCR 0xA4050106 1198*4882a593Smuzhiyun #define PECR 0xA4050108 1199*4882a593Smuzhiyun #define PFCR 0xA405010A 1200*4882a593Smuzhiyun #define PGCR 0xA405010C 1201*4882a593Smuzhiyun #define PHCR 0xA405010E 1202*4882a593Smuzhiyun #define PJCR 0xA4050110 1203*4882a593Smuzhiyun #define PKCR 0xA4050112 1204*4882a593Smuzhiyun #define PLCR 0xA4050114 1205*4882a593Smuzhiyun #define PMCR 0xA4050116 1206*4882a593Smuzhiyun #define PNCR 0xA4050118 1207*4882a593Smuzhiyun #define PQCR 0xA405011A 1208*4882a593Smuzhiyun #define PRCR 0xA405011C 1209*4882a593Smuzhiyun #define PSCR 0xA405011E 1210*4882a593Smuzhiyun #define PTCR 0xA4050140 1211*4882a593Smuzhiyun #define PUCR 0xA4050142 1212*4882a593Smuzhiyun #define PVCR 0xA4050144 1213*4882a593Smuzhiyun #define PWCR 0xA4050146 1214*4882a593Smuzhiyun #define PXCR 0xA4050148 1215*4882a593Smuzhiyun #define PYCR 0xA405014A 1216*4882a593Smuzhiyun #define PZCR 0xA405014C 1217*4882a593Smuzhiyun #define PSELA 0xA405014E 1218*4882a593Smuzhiyun #define PSELB 0xA4050150 1219*4882a593Smuzhiyun #define PSELC 0xA4050152 1220*4882a593Smuzhiyun #define PSELD 0xA4050154 1221*4882a593Smuzhiyun #define PSELE 0xA4050156 1222*4882a593Smuzhiyun #define HIZCRA 0xA4050158 1223*4882a593Smuzhiyun #define HIZCRB 0xA405015A 1224*4882a593Smuzhiyun #define HIZCRC 0xA405015C 1225*4882a593Smuzhiyun #define HIZCRC 0xA405015C 1226*4882a593Smuzhiyun #define MSELCRA 0xA4050180 1227*4882a593Smuzhiyun #define MSELCRB 0xA4050182 1228*4882a593Smuzhiyun #define PULCR 0xA4050184 1229*4882a593Smuzhiyun #define SBSCR 0xA4050186 1230*4882a593Smuzhiyun #define DRVCR 0xA405018A 1231*4882a593Smuzhiyun 1232*4882a593Smuzhiyun /* I/O Port */ 1233*4882a593Smuzhiyun #define PADR 0xA4050120 1234*4882a593Smuzhiyun #define PBDR 0xA4050122 1235*4882a593Smuzhiyun #define PCDR 0xA4050124 1236*4882a593Smuzhiyun #define PDDR 0xA4050126 1237*4882a593Smuzhiyun #define PEDR 0xA4050128 1238*4882a593Smuzhiyun #define PFDR 0xA405012A 1239*4882a593Smuzhiyun #define PGDR 0xA405012C 1240*4882a593Smuzhiyun #define PHDR 0xA405012E 1241*4882a593Smuzhiyun #define PJDR 0xA4050130 1242*4882a593Smuzhiyun #define PKDR 0xA4050132 1243*4882a593Smuzhiyun #define PLDR 0xA4050134 1244*4882a593Smuzhiyun #define PMDR 0xA4050136 1245*4882a593Smuzhiyun #define PNDR 0xA4050138 1246*4882a593Smuzhiyun #define PQDR 0xA405013A 1247*4882a593Smuzhiyun #define PRDR 0xA405013C 1248*4882a593Smuzhiyun #define PSDR 0xA405013E 1249*4882a593Smuzhiyun #define PTDR 0xA4050160 1250*4882a593Smuzhiyun #define PUDR 0xA4050162 1251*4882a593Smuzhiyun #define PVDR 0xA4050164 1252*4882a593Smuzhiyun #define PWDR 0xA4050166 1253*4882a593Smuzhiyun #define PXDR 0xA4050168 1254*4882a593Smuzhiyun #define PYDR 0xA405016A 1255*4882a593Smuzhiyun #define PZDR 0xA405016C 1256*4882a593Smuzhiyun 1257*4882a593Smuzhiyun /* UBC */ 1258*4882a593Smuzhiyun #define CBR0 0xFF200000 1259*4882a593Smuzhiyun #define CRR0 0xFF200004 1260*4882a593Smuzhiyun #define CAR0 0xFF200008 1261*4882a593Smuzhiyun #define CAMR0 0xFF20000C 1262*4882a593Smuzhiyun #define CBR1 0xFF200020 1263*4882a593Smuzhiyun #define CRR1 0xFF200024 1264*4882a593Smuzhiyun #define CAR1 0xFF200028 1265*4882a593Smuzhiyun #define CAMR1 0xFF20002C 1266*4882a593Smuzhiyun #define CDR1 0xFF200030 1267*4882a593Smuzhiyun #define CDMR1 0xFF200034 1268*4882a593Smuzhiyun #define CETR1 0xFF200038 1269*4882a593Smuzhiyun #define CCMFR 0xFF200600 1270*4882a593Smuzhiyun #define CBCR 0xFF200620 1271*4882a593Smuzhiyun 1272*4882a593Smuzhiyun /* H-UDI */ 1273*4882a593Smuzhiyun #define SDIR 0xFC110000 1274*4882a593Smuzhiyun #define SDDRH 0xFC110008 1275*4882a593Smuzhiyun #define SDDRL 0xFC11000A 1276*4882a593Smuzhiyun #define SDINT 0xFC110018 1277*4882a593Smuzhiyun 1278*4882a593Smuzhiyun #endif /* _ASM_CPU_SH7722_H_ */ 1279