xref: /OK3568_Linux_fs/u-boot/arch/sh/cpu/sh3/cpu.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2007
3*4882a593Smuzhiyun  * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * (C) Copyright 2007
6*4882a593Smuzhiyun  * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <command.h>
13*4882a593Smuzhiyun #include <asm/processor.h>
14*4882a593Smuzhiyun 
checkcpu(void)15*4882a593Smuzhiyun int checkcpu(void)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun 	puts("CPU: SH3\n");
18*4882a593Smuzhiyun 	return 0;
19*4882a593Smuzhiyun }
20*4882a593Smuzhiyun 
cpu_init(void)21*4882a593Smuzhiyun int cpu_init(void)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun 	return 0;
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun 
cleanup_before_linux(void)26*4882a593Smuzhiyun int cleanup_before_linux(void)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun 	disable_interrupts();
29*4882a593Smuzhiyun 	return 0;
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun 
do_reset(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])32*4882a593Smuzhiyun int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	disable_interrupts();
35*4882a593Smuzhiyun 	reset_cpu(0);
36*4882a593Smuzhiyun 	return 0;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun 
flush_cache(unsigned long addr,unsigned long size)39*4882a593Smuzhiyun void flush_cache(unsigned long addr, unsigned long size)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun 
icache_enable(void)44*4882a593Smuzhiyun void icache_enable(void)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun 
icache_disable(void)48*4882a593Smuzhiyun void icache_disable(void)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun 
icache_status(void)52*4882a593Smuzhiyun int icache_status(void)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun 	return 0;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun 
dcache_enable(void)57*4882a593Smuzhiyun void dcache_enable(void)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
dcache_disable(void)61*4882a593Smuzhiyun void dcache_disable(void)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun 
dcache_status(void)65*4882a593Smuzhiyun int dcache_status(void)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	return 0;
68*4882a593Smuzhiyun }
69