1*4882a593Smuzhiyun #ifndef _PPC_PTRACE_H 2*4882a593Smuzhiyun #define _PPC_PTRACE_H 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun /* 5*4882a593Smuzhiyun * This struct defines the way the registers are stored on the 6*4882a593Smuzhiyun * kernel stack during a system call or other kernel entry. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * this should only contain volatile regs 9*4882a593Smuzhiyun * since we can keep non-volatile in the thread_struct 10*4882a593Smuzhiyun * should set this up when only volatiles are saved 11*4882a593Smuzhiyun * by intr code. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * Since this is going on the stack, *CARE MUST BE TAKEN* to insure 14*4882a593Smuzhiyun * that the overall structure is a multiple of 16 bytes in length. 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * Note that the offsets of the fields in this struct correspond with 17*4882a593Smuzhiyun * the PT_* values below. This simplifies arch/powerpc/kernel/ptrace.c. 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 21*4882a593Smuzhiyun #ifdef CONFIG_PPC64BRIDGE 22*4882a593Smuzhiyun #define PPC_REG unsigned long /*long*/ 23*4882a593Smuzhiyun #else 24*4882a593Smuzhiyun #define PPC_REG unsigned long 25*4882a593Smuzhiyun #endif 26*4882a593Smuzhiyun struct pt_regs { 27*4882a593Smuzhiyun PPC_REG gpr[32]; 28*4882a593Smuzhiyun PPC_REG nip; 29*4882a593Smuzhiyun PPC_REG msr; 30*4882a593Smuzhiyun PPC_REG orig_gpr3; /* Used for restarting system calls */ 31*4882a593Smuzhiyun PPC_REG ctr; 32*4882a593Smuzhiyun PPC_REG link; 33*4882a593Smuzhiyun PPC_REG xer; 34*4882a593Smuzhiyun PPC_REG ccr; 35*4882a593Smuzhiyun PPC_REG mq; /* 601 only (not used at present) */ 36*4882a593Smuzhiyun /* Used on APUS to hold IPL value. */ 37*4882a593Smuzhiyun PPC_REG trap; /* Reason for being here */ 38*4882a593Smuzhiyun PPC_REG dar; /* Fault registers */ 39*4882a593Smuzhiyun PPC_REG dsisr; 40*4882a593Smuzhiyun PPC_REG result; /* Result of a system call */ 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun #endif 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */ 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* Size of stack frame allocated when calling signal handler. */ 47*4882a593Smuzhiyun #define __SIGNAL_FRAMESIZE 64 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #define instruction_pointer(regs) ((regs)->nip) 50*4882a593Smuzhiyun #define user_mode(regs) (((regs)->msr & MSR_PR) != 0) 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* 53*4882a593Smuzhiyun * Offsets used by 'ptrace' system call interface. 54*4882a593Smuzhiyun * These can't be changed without breaking binary compatibility 55*4882a593Smuzhiyun * with MkLinux, etc. 56*4882a593Smuzhiyun */ 57*4882a593Smuzhiyun #define PT_R0 0 58*4882a593Smuzhiyun #define PT_R1 1 59*4882a593Smuzhiyun #define PT_R2 2 60*4882a593Smuzhiyun #define PT_R3 3 61*4882a593Smuzhiyun #define PT_R4 4 62*4882a593Smuzhiyun #define PT_R5 5 63*4882a593Smuzhiyun #define PT_R6 6 64*4882a593Smuzhiyun #define PT_R7 7 65*4882a593Smuzhiyun #define PT_R8 8 66*4882a593Smuzhiyun #define PT_R9 9 67*4882a593Smuzhiyun #define PT_R10 10 68*4882a593Smuzhiyun #define PT_R11 11 69*4882a593Smuzhiyun #define PT_R12 12 70*4882a593Smuzhiyun #define PT_R13 13 71*4882a593Smuzhiyun #define PT_R14 14 72*4882a593Smuzhiyun #define PT_R15 15 73*4882a593Smuzhiyun #define PT_R16 16 74*4882a593Smuzhiyun #define PT_R17 17 75*4882a593Smuzhiyun #define PT_R18 18 76*4882a593Smuzhiyun #define PT_R19 19 77*4882a593Smuzhiyun #define PT_R20 20 78*4882a593Smuzhiyun #define PT_R21 21 79*4882a593Smuzhiyun #define PT_R22 22 80*4882a593Smuzhiyun #define PT_R23 23 81*4882a593Smuzhiyun #define PT_R24 24 82*4882a593Smuzhiyun #define PT_R25 25 83*4882a593Smuzhiyun #define PT_R26 26 84*4882a593Smuzhiyun #define PT_R27 27 85*4882a593Smuzhiyun #define PT_R28 28 86*4882a593Smuzhiyun #define PT_R29 29 87*4882a593Smuzhiyun #define PT_R30 30 88*4882a593Smuzhiyun #define PT_R31 31 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #define PT_NIP 32 91*4882a593Smuzhiyun #define PT_MSR 33 92*4882a593Smuzhiyun #ifdef __KERNEL__ 93*4882a593Smuzhiyun #define PT_ORIG_R3 34 94*4882a593Smuzhiyun #endif 95*4882a593Smuzhiyun #define PT_CTR 35 96*4882a593Smuzhiyun #define PT_LNK 36 97*4882a593Smuzhiyun #define PT_XER 37 98*4882a593Smuzhiyun #define PT_CCR 38 99*4882a593Smuzhiyun #define PT_MQ 39 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */ 102*4882a593Smuzhiyun #define PT_FPR31 (PT_FPR0 + 2*31) 103*4882a593Smuzhiyun #define PT_FPSCR (PT_FPR0 + 2*32 + 1) 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun #endif 106