1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2002-2010 3*4882a593Smuzhiyun * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __ASM_GBL_DATA_H 9*4882a593Smuzhiyun #define __ASM_GBL_DATA_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include "config.h" 12*4882a593Smuzhiyun #include "asm/types.h" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* Architecture-specific global data */ 15*4882a593Smuzhiyun struct arch_global_data { 16*4882a593Smuzhiyun #if defined(CONFIG_FSL_ESDHC) 17*4882a593Smuzhiyun u32 sdhc_clk; 18*4882a593Smuzhiyun #if defined(CONFIG_FSL_ESDHC_ADAPTER_IDENT) 19*4882a593Smuzhiyun u8 sdhc_adapter; 20*4882a593Smuzhiyun #endif 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun #if defined(CONFIG_MPC8xx) 23*4882a593Smuzhiyun unsigned long brg_clk; 24*4882a593Smuzhiyun #endif 25*4882a593Smuzhiyun #if defined(CONFIG_CPM2) 26*4882a593Smuzhiyun /* There are many clocks on the MPC8260 - see page 9-5 */ 27*4882a593Smuzhiyun unsigned long vco_out; 28*4882a593Smuzhiyun unsigned long cpm_clk; 29*4882a593Smuzhiyun unsigned long scc_clk; 30*4882a593Smuzhiyun unsigned long brg_clk; 31*4882a593Smuzhiyun #endif 32*4882a593Smuzhiyun /* TODO: sjg@chromium.org: Should these be unslgned long? */ 33*4882a593Smuzhiyun #if defined(CONFIG_MPC83xx) 34*4882a593Smuzhiyun /* There are other clocks in the MPC83XX */ 35*4882a593Smuzhiyun u32 csb_clk; 36*4882a593Smuzhiyun # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 37*4882a593Smuzhiyun defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) 38*4882a593Smuzhiyun u32 tsec1_clk; 39*4882a593Smuzhiyun u32 tsec2_clk; 40*4882a593Smuzhiyun u32 usbdr_clk; 41*4882a593Smuzhiyun # elif defined(CONFIG_MPC8309) 42*4882a593Smuzhiyun u32 usbdr_clk; 43*4882a593Smuzhiyun # endif 44*4882a593Smuzhiyun # if defined(CONFIG_MPC834x) 45*4882a593Smuzhiyun u32 usbmph_clk; 46*4882a593Smuzhiyun # endif /* CONFIG_MPC834x */ 47*4882a593Smuzhiyun # if defined(CONFIG_MPC8315) 48*4882a593Smuzhiyun u32 tdm_clk; 49*4882a593Smuzhiyun # endif 50*4882a593Smuzhiyun u32 core_clk; 51*4882a593Smuzhiyun u32 enc_clk; 52*4882a593Smuzhiyun u32 lbiu_clk; 53*4882a593Smuzhiyun u32 lclk_clk; 54*4882a593Smuzhiyun # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 55*4882a593Smuzhiyun defined(CONFIG_MPC837x) 56*4882a593Smuzhiyun u32 pciexp1_clk; 57*4882a593Smuzhiyun u32 pciexp2_clk; 58*4882a593Smuzhiyun # endif 59*4882a593Smuzhiyun # if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) 60*4882a593Smuzhiyun u32 sata_clk; 61*4882a593Smuzhiyun # endif 62*4882a593Smuzhiyun # if defined(CONFIG_MPC8360) 63*4882a593Smuzhiyun u32 mem_sec_clk; 64*4882a593Smuzhiyun # endif /* CONFIG_MPC8360 */ 65*4882a593Smuzhiyun #endif 66*4882a593Smuzhiyun #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 67*4882a593Smuzhiyun u32 lbc_clk; 68*4882a593Smuzhiyun void *cpu; 69*4882a593Smuzhiyun #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ 70*4882a593Smuzhiyun #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \ 71*4882a593Smuzhiyun defined(CONFIG_MPC86xx) 72*4882a593Smuzhiyun u32 i2c1_clk; 73*4882a593Smuzhiyun u32 i2c2_clk; 74*4882a593Smuzhiyun #endif 75*4882a593Smuzhiyun #if defined(CONFIG_QE) 76*4882a593Smuzhiyun u32 qe_clk; 77*4882a593Smuzhiyun u32 brg_clk; 78*4882a593Smuzhiyun uint mp_alloc_base; 79*4882a593Smuzhiyun uint mp_alloc_top; 80*4882a593Smuzhiyun #endif /* CONFIG_QE */ 81*4882a593Smuzhiyun #if defined(CONFIG_FSL_LAW) 82*4882a593Smuzhiyun u32 used_laws; 83*4882a593Smuzhiyun #endif 84*4882a593Smuzhiyun #if defined(CONFIG_E500) 85*4882a593Smuzhiyun u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32]; 86*4882a593Smuzhiyun #endif 87*4882a593Smuzhiyun unsigned long reset_status; /* reset status register at boot */ 88*4882a593Smuzhiyun #if defined(CONFIG_MPC83xx) 89*4882a593Smuzhiyun unsigned long arbiter_event_attributes; 90*4882a593Smuzhiyun unsigned long arbiter_event_address; 91*4882a593Smuzhiyun #endif 92*4882a593Smuzhiyun #if defined(CONFIG_CPM2) 93*4882a593Smuzhiyun unsigned int dp_alloc_base; 94*4882a593Smuzhiyun unsigned int dp_alloc_top; 95*4882a593Smuzhiyun #endif 96*4882a593Smuzhiyun #ifdef CONFIG_SYS_FPGA_COUNT 97*4882a593Smuzhiyun unsigned fpga_state[CONFIG_SYS_FPGA_COUNT]; 98*4882a593Smuzhiyun #endif 99*4882a593Smuzhiyun #if defined(CONFIG_WD_MAX_RATE) 100*4882a593Smuzhiyun unsigned long long wdt_last; /* trace watch-dog triggering rate */ 101*4882a593Smuzhiyun #endif 102*4882a593Smuzhiyun #if defined(CONFIG_LWMON5) 103*4882a593Smuzhiyun unsigned long kbd_status; 104*4882a593Smuzhiyun #endif 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun #include <asm-generic/global_data.h> 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #if 1 110*4882a593Smuzhiyun #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") 111*4882a593Smuzhiyun #else /* We could use plain global data, but the resulting code is bigger */ 112*4882a593Smuzhiyun #define XTRN_DECLARE_GLOBAL_DATA_PTR extern 113*4882a593Smuzhiyun #define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \ 114*4882a593Smuzhiyun gd_t *gd 115*4882a593Smuzhiyun #endif 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun #endif /* __ASM_GBL_DATA_H */ 118