1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 3*4882a593Smuzhiyun */ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #ifndef _MPC83XX_GPIO_H_ 6*4882a593Smuzhiyun #define _MPC83XX_GPIO_H_ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* 9*4882a593Smuzhiyun * The MCP83xx's 1-2 GPIO controllers each with 32 bits. 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun #if defined(CONFIG_MPC8313) || defined(CONFIG_MPC8308) || \ 12*4882a593Smuzhiyun defined(CONFIG_MPC8315) 13*4882a593Smuzhiyun #define MPC83XX_GPIO_CTRLRS 1 14*4882a593Smuzhiyun #elif defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) 15*4882a593Smuzhiyun #define MPC83XX_GPIO_CTRLRS 2 16*4882a593Smuzhiyun #else 17*4882a593Smuzhiyun #define MPC83XX_GPIO_CTRLRS 0 18*4882a593Smuzhiyun #endif 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun void mpc83xx_gpio_init_f(void); 23*4882a593Smuzhiyun void mpc83xx_gpio_init_r(void); 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #endif /* MPC83XX_GPIO_H_ */ 26