1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * FSL PAMU driver
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright 2012-2016 Freescale Semiconductor, Inc.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <linux/log2.h>
11*4882a593Smuzhiyun #include <malloc.h>
12*4882a593Smuzhiyun #include <asm/fsl_pamu.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun struct paace *ppaact;
15*4882a593Smuzhiyun struct paace *sec;
16*4882a593Smuzhiyun unsigned long fspi;
17*4882a593Smuzhiyun
__ilog2_roundup_64(uint64_t val)18*4882a593Smuzhiyun static inline int __ilog2_roundup_64(uint64_t val)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun if ((val & (val - 1)) == 0)
21*4882a593Smuzhiyun return __ilog2_u64(val);
22*4882a593Smuzhiyun else
23*4882a593Smuzhiyun return __ilog2_u64(val) + 1;
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun
count_lsb_zeroes(unsigned long val)27*4882a593Smuzhiyun static inline int count_lsb_zeroes(unsigned long val)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun return ffs(val) - 1;
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
map_addrspace_size_to_wse(uint64_t addrspace_size)32*4882a593Smuzhiyun static unsigned int map_addrspace_size_to_wse(uint64_t addrspace_size)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun /* window size is 2^(WSE+1) bytes */
35*4882a593Smuzhiyun return count_lsb_zeroes(addrspace_size >> PAMU_PAGE_SHIFT) +
36*4882a593Smuzhiyun PAMU_PAGE_SHIFT - 1;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
map_subwindow_cnt_to_wce(uint32_t subwindow_cnt)39*4882a593Smuzhiyun static unsigned int map_subwindow_cnt_to_wce(uint32_t subwindow_cnt)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun /* window count is 2^(WCE+1) bytes */
42*4882a593Smuzhiyun return count_lsb_zeroes(subwindow_cnt) - 1;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
pamu_setup_default_xfer_to_host_ppaace(struct paace * ppaace)45*4882a593Smuzhiyun static void pamu_setup_default_xfer_to_host_ppaace(struct paace *ppaace)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun set_bf(ppaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_PRIMARY);
48*4882a593Smuzhiyun set_bf(ppaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR,
49*4882a593Smuzhiyun PAACE_M_COHERENCE_REQ);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
pamu_setup_default_xfer_to_host_spaace(struct paace * spaace)52*4882a593Smuzhiyun static void pamu_setup_default_xfer_to_host_spaace(struct paace *spaace)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun set_bf(spaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_SECONDARY);
55*4882a593Smuzhiyun set_bf(spaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR,
56*4882a593Smuzhiyun PAACE_M_COHERENCE_REQ);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /** Sets up PPAACE entry for specified liodn
60*4882a593Smuzhiyun *
61*4882a593Smuzhiyun * @param[in] liodn Logical IO device number
62*4882a593Smuzhiyun * @param[in] win_addr starting address of DSA window
63*4882a593Smuzhiyun * @param[in] win-size size of DSA window
64*4882a593Smuzhiyun * @param[in] omi Operation mapping index -- if ~omi == 0 then omi
65*4882a593Smuzhiyun not defined
66*4882a593Smuzhiyun * @param[in] stashid cache stash id for associated cpu -- if ~stashid == 0
67*4882a593Smuzhiyun then stashid not defined
68*4882a593Smuzhiyun * @param[in] snoopid snoop id for hardware coherency -- if ~snoopid == 0
69*4882a593Smuzhiyun then snoopid not defined
70*4882a593Smuzhiyun * @param[in] subwin_cnt number of sub-windows
71*4882a593Smuzhiyun *
72*4882a593Smuzhiyun * @return Returns 0 upon success else error code < 0 returned
73*4882a593Smuzhiyun */
pamu_config_ppaace(uint32_t liodn,uint64_t win_addr,uint64_t win_size,uint32_t omi,uint32_t snoopid,uint32_t stashid,uint32_t subwin_cnt)74*4882a593Smuzhiyun static int pamu_config_ppaace(uint32_t liodn, uint64_t win_addr,
75*4882a593Smuzhiyun uint64_t win_size, uint32_t omi,
76*4882a593Smuzhiyun uint32_t snoopid, uint32_t stashid,
77*4882a593Smuzhiyun uint32_t subwin_cnt)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun struct paace *ppaace;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun if ((win_size & (win_size - 1)) || win_size < PAMU_PAGE_SIZE)
82*4882a593Smuzhiyun return -1;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun if (win_addr & (win_size - 1))
85*4882a593Smuzhiyun return -2;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun if (liodn > NUM_PPAACT_ENTRIES) {
88*4882a593Smuzhiyun printf("Entries in PPACT not sufficient\n");
89*4882a593Smuzhiyun return -3;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun ppaace = &ppaact[liodn];
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /* window size is 2^(WSE+1) bytes */
95*4882a593Smuzhiyun set_bf(ppaace->addr_bitfields, PPAACE_AF_WSE,
96*4882a593Smuzhiyun map_addrspace_size_to_wse(win_size));
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun pamu_setup_default_xfer_to_host_ppaace(ppaace);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun if (sizeof(phys_addr_t) > 4)
101*4882a593Smuzhiyun ppaace->wbah = (u64)win_addr >> (PAMU_PAGE_SHIFT + 20);
102*4882a593Smuzhiyun else
103*4882a593Smuzhiyun ppaace->wbah = 0;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun set_bf(ppaace->addr_bitfields, PPAACE_AF_WBAL,
106*4882a593Smuzhiyun (win_addr >> PAMU_PAGE_SHIFT));
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* set up operation mapping if it's configured */
109*4882a593Smuzhiyun if (omi < OME_NUMBER_ENTRIES) {
110*4882a593Smuzhiyun set_bf(ppaace->impl_attr, PAACE_IA_OTM, PAACE_OTM_INDEXED);
111*4882a593Smuzhiyun ppaace->op_encode.index_ot.omi = omi;
112*4882a593Smuzhiyun } else if (~omi != 0) {
113*4882a593Smuzhiyun return -3;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /* configure stash id */
117*4882a593Smuzhiyun if (~stashid != 0)
118*4882a593Smuzhiyun set_bf(ppaace->impl_attr, PAACE_IA_CID, stashid);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /* configure snoop id */
121*4882a593Smuzhiyun if (~snoopid != 0)
122*4882a593Smuzhiyun ppaace->domain_attr.to_host.snpid = snoopid;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun if (subwin_cnt) {
125*4882a593Smuzhiyun /* window count is 2^(WCE+1) bytes */
126*4882a593Smuzhiyun set_bf(ppaace->impl_attr, PAACE_IA_WCE,
127*4882a593Smuzhiyun map_subwindow_cnt_to_wce(subwin_cnt));
128*4882a593Smuzhiyun set_bf(ppaace->addr_bitfields, PPAACE_AF_MW, 0x1);
129*4882a593Smuzhiyun ppaace->fspi = fspi;
130*4882a593Smuzhiyun fspi = fspi + DEFAULT_NUM_SUBWINDOWS - 1;
131*4882a593Smuzhiyun } else {
132*4882a593Smuzhiyun set_bf(ppaace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun asm volatile("sync" : : : "memory");
136*4882a593Smuzhiyun /* Mark the ppace entry valid */
137*4882a593Smuzhiyun ppaace->addr_bitfields |= PAACE_V_VALID;
138*4882a593Smuzhiyun asm volatile("sync" : : : "memory");
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun return 0;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
pamu_config_spaace(uint32_t liodn,uint64_t subwin_size,uint64_t subwin_addr,uint64_t size,uint32_t omi,uint32_t snoopid,uint32_t stashid)143*4882a593Smuzhiyun static int pamu_config_spaace(uint32_t liodn,
144*4882a593Smuzhiyun uint64_t subwin_size, uint64_t subwin_addr, uint64_t size,
145*4882a593Smuzhiyun uint32_t omi, uint32_t snoopid, uint32_t stashid)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun struct paace *paace;
148*4882a593Smuzhiyun /* Align start addr of subwin to subwindoe size */
149*4882a593Smuzhiyun uint64_t sec_addr = subwin_addr & ~(subwin_size - 1);
150*4882a593Smuzhiyun uint64_t end_addr = subwin_addr + size;
151*4882a593Smuzhiyun int size_shift = __ilog2_u64(subwin_size);
152*4882a593Smuzhiyun uint64_t win_size = 0;
153*4882a593Smuzhiyun uint32_t index, swse;
154*4882a593Smuzhiyun unsigned long fspi_idx;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /* Recalculate the size */
157*4882a593Smuzhiyun size = end_addr - sec_addr;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun if (!subwin_size)
160*4882a593Smuzhiyun return -1;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun if (liodn > NUM_PPAACT_ENTRIES) {
163*4882a593Smuzhiyun printf("LIODN No programmed %d > no. of PPAACT entries %d\n",
164*4882a593Smuzhiyun liodn, NUM_PPAACT_ENTRIES);
165*4882a593Smuzhiyun return -1;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun while (sec_addr < end_addr) {
169*4882a593Smuzhiyun debug("sec_addr < end_addr is %llx < %llx\n", sec_addr,
170*4882a593Smuzhiyun end_addr);
171*4882a593Smuzhiyun paace = &ppaact[liodn];
172*4882a593Smuzhiyun if (!paace)
173*4882a593Smuzhiyun return -1;
174*4882a593Smuzhiyun fspi_idx = paace->fspi;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun /* Calculating the win_size here as if we map in index 0,
177*4882a593Smuzhiyun paace entry woudl need to be programmed for SWSE */
178*4882a593Smuzhiyun win_size = end_addr - sec_addr;
179*4882a593Smuzhiyun win_size = 1 << __ilog2_roundup_64(win_size);
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun if (win_size > subwin_size)
182*4882a593Smuzhiyun win_size = subwin_size;
183*4882a593Smuzhiyun else if (win_size < PAMU_PAGE_SIZE)
184*4882a593Smuzhiyun win_size = PAMU_PAGE_SIZE;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun debug("win_size is %llx\n", win_size);
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun swse = map_addrspace_size_to_wse(win_size);
189*4882a593Smuzhiyun index = sec_addr >> size_shift;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun if (index == 0) {
192*4882a593Smuzhiyun set_bf(paace->win_bitfields, PAACE_WIN_SWSE, swse);
193*4882a593Smuzhiyun set_bf(paace->addr_bitfields, PAACE_AF_AP,
194*4882a593Smuzhiyun PAACE_AP_PERMS_ALL);
195*4882a593Smuzhiyun sec_addr += subwin_size;
196*4882a593Smuzhiyun continue;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun paace = sec + fspi_idx + index - 1;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun debug("SPAACT:Writing at location %p, index %d\n", paace,
202*4882a593Smuzhiyun index);
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun pamu_setup_default_xfer_to_host_spaace(paace);
205*4882a593Smuzhiyun set_bf(paace->addr_bitfields, SPAACE_AF_LIODN, liodn);
206*4882a593Smuzhiyun set_bf(paace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL);
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun /* configure snoop id */
209*4882a593Smuzhiyun if (~snoopid != 0)
210*4882a593Smuzhiyun paace->domain_attr.to_host.snpid = snoopid;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun if (paace->addr_bitfields & PAACE_V_VALID) {
213*4882a593Smuzhiyun debug("Reached overlap condition\n");
214*4882a593Smuzhiyun debug("%d < %d\n", get_bf(paace->win_bitfields,
215*4882a593Smuzhiyun PAACE_WIN_SWSE), swse);
216*4882a593Smuzhiyun if (get_bf(paace->win_bitfields, PAACE_WIN_SWSE) < swse)
217*4882a593Smuzhiyun set_bf(paace->win_bitfields, PAACE_WIN_SWSE,
218*4882a593Smuzhiyun swse);
219*4882a593Smuzhiyun } else {
220*4882a593Smuzhiyun set_bf(paace->win_bitfields, PAACE_WIN_SWSE, swse);
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun paace->addr_bitfields |= PAACE_V_VALID;
224*4882a593Smuzhiyun sec_addr += subwin_size;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun return 0;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
pamu_init(void)230*4882a593Smuzhiyun int pamu_init(void)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun u32 base_addr = CONFIG_SYS_PAMU_ADDR;
233*4882a593Smuzhiyun struct ccsr_pamu *regs;
234*4882a593Smuzhiyun u32 i = 0;
235*4882a593Smuzhiyun u64 ppaact_phys, ppaact_lim, ppaact_size;
236*4882a593Smuzhiyun u64 spaact_phys, spaact_lim, spaact_size;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun ppaact_size = sizeof(struct paace) * NUM_PPAACT_ENTRIES;
239*4882a593Smuzhiyun spaact_size = sizeof(struct paace) * NUM_SPAACT_ENTRIES;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun /* Allocate space for Primary PAACT Table */
242*4882a593Smuzhiyun #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_PPAACT_ADDR))
243*4882a593Smuzhiyun ppaact = (void *)CONFIG_SPL_PPAACT_ADDR;
244*4882a593Smuzhiyun #else
245*4882a593Smuzhiyun ppaact = memalign(PAMU_TABLE_ALIGNMENT, ppaact_size);
246*4882a593Smuzhiyun if (!ppaact)
247*4882a593Smuzhiyun return -1;
248*4882a593Smuzhiyun #endif
249*4882a593Smuzhiyun memset(ppaact, 0, ppaact_size);
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun /* Allocate space for Secondary PAACT Table */
252*4882a593Smuzhiyun #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SPAACT_ADDR))
253*4882a593Smuzhiyun sec = (void *)CONFIG_SPL_SPAACT_ADDR;
254*4882a593Smuzhiyun #else
255*4882a593Smuzhiyun sec = memalign(PAMU_TABLE_ALIGNMENT, spaact_size);
256*4882a593Smuzhiyun if (!sec)
257*4882a593Smuzhiyun return -1;
258*4882a593Smuzhiyun #endif
259*4882a593Smuzhiyun memset(sec, 0, spaact_size);
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun ppaact_phys = virt_to_phys((void *)ppaact);
262*4882a593Smuzhiyun ppaact_lim = ppaact_phys + ppaact_size;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun spaact_phys = (uint64_t)virt_to_phys((void *)sec);
265*4882a593Smuzhiyun spaact_lim = spaact_phys + spaact_size;
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun /* Configure all PAMU's */
268*4882a593Smuzhiyun for (i = 0; i < CONFIG_NUM_PAMU; i++) {
269*4882a593Smuzhiyun regs = (struct ccsr_pamu *)base_addr;
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun out_be32(®s->ppbah, ppaact_phys >> 32);
272*4882a593Smuzhiyun out_be32(®s->ppbal, (uint32_t)ppaact_phys);
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun out_be32(®s->pplah, (ppaact_lim) >> 32);
275*4882a593Smuzhiyun out_be32(®s->pplal, (uint32_t)ppaact_lim);
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun if (sec != NULL) {
278*4882a593Smuzhiyun out_be32(®s->spbah, spaact_phys >> 32);
279*4882a593Smuzhiyun out_be32(®s->spbal, (uint32_t)spaact_phys);
280*4882a593Smuzhiyun out_be32(®s->splah, spaact_lim >> 32);
281*4882a593Smuzhiyun out_be32(®s->splal, (uint32_t)spaact_lim);
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun asm volatile("sync" : : : "memory");
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun base_addr += PAMU_OFFSET;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun return 0;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
pamu_enable(void)291*4882a593Smuzhiyun void pamu_enable(void)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun u32 i = 0;
294*4882a593Smuzhiyun u32 base_addr = CONFIG_SYS_PAMU_ADDR;
295*4882a593Smuzhiyun for (i = 0; i < CONFIG_NUM_PAMU; i++) {
296*4882a593Smuzhiyun setbits_be32((void *)base_addr + PAMU_PCR_OFFSET,
297*4882a593Smuzhiyun PAMU_PCR_PE);
298*4882a593Smuzhiyun asm volatile("sync" : : : "memory");
299*4882a593Smuzhiyun base_addr += PAMU_OFFSET;
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
pamu_reset(void)303*4882a593Smuzhiyun void pamu_reset(void)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun u32 i = 0;
306*4882a593Smuzhiyun u32 base_addr = CONFIG_SYS_PAMU_ADDR;
307*4882a593Smuzhiyun struct ccsr_pamu *regs;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun for (i = 0; i < CONFIG_NUM_PAMU; i++) {
310*4882a593Smuzhiyun regs = (struct ccsr_pamu *)base_addr;
311*4882a593Smuzhiyun /* Clear PPAACT Base register */
312*4882a593Smuzhiyun out_be32(®s->ppbah, 0);
313*4882a593Smuzhiyun out_be32(®s->ppbal, 0);
314*4882a593Smuzhiyun out_be32(®s->pplah, 0);
315*4882a593Smuzhiyun out_be32(®s->pplal, 0);
316*4882a593Smuzhiyun out_be32(®s->spbah, 0);
317*4882a593Smuzhiyun out_be32(®s->spbal, 0);
318*4882a593Smuzhiyun out_be32(®s->splah, 0);
319*4882a593Smuzhiyun out_be32(®s->splal, 0);
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun clrbits_be32((void *)regs + PAMU_PCR_OFFSET, PAMU_PCR_PE);
322*4882a593Smuzhiyun asm volatile("sync" : : : "memory");
323*4882a593Smuzhiyun base_addr += PAMU_OFFSET;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
pamu_disable(void)327*4882a593Smuzhiyun void pamu_disable(void)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun u32 i = 0;
330*4882a593Smuzhiyun u32 base_addr = CONFIG_SYS_PAMU_ADDR;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun for (i = 0; i < CONFIG_NUM_PAMU; i++) {
334*4882a593Smuzhiyun clrbits_be32((void *)base_addr + PAMU_PCR_OFFSET, PAMU_PCR_PE);
335*4882a593Smuzhiyun asm volatile("sync" : : : "memory");
336*4882a593Smuzhiyun base_addr += PAMU_OFFSET;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun
find_max(uint64_t arr[],int num)341*4882a593Smuzhiyun static uint64_t find_max(uint64_t arr[], int num)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun int i = 0;
344*4882a593Smuzhiyun int max = 0;
345*4882a593Smuzhiyun for (i = 1 ; i < num; i++)
346*4882a593Smuzhiyun if (arr[max] < arr[i])
347*4882a593Smuzhiyun max = i;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun return arr[max];
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun
find_min(uint64_t arr[],int num)352*4882a593Smuzhiyun static uint64_t find_min(uint64_t arr[], int num)
353*4882a593Smuzhiyun {
354*4882a593Smuzhiyun int i = 0;
355*4882a593Smuzhiyun int min = 0;
356*4882a593Smuzhiyun for (i = 1 ; i < num; i++)
357*4882a593Smuzhiyun if (arr[min] > arr[i])
358*4882a593Smuzhiyun min = i;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun return arr[min];
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun
get_win_cnt(uint64_t size)363*4882a593Smuzhiyun static uint32_t get_win_cnt(uint64_t size)
364*4882a593Smuzhiyun {
365*4882a593Smuzhiyun uint32_t win_cnt = DEFAULT_NUM_SUBWINDOWS;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun while (win_cnt && (size/win_cnt) < PAMU_PAGE_SIZE)
368*4882a593Smuzhiyun win_cnt >>= 1;
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun return win_cnt;
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
config_pamu(struct pamu_addr_tbl * tbl,int num_entries,uint32_t liodn)373*4882a593Smuzhiyun int config_pamu(struct pamu_addr_tbl *tbl, int num_entries, uint32_t liodn)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun int i = 0;
376*4882a593Smuzhiyun int ret = 0;
377*4882a593Smuzhiyun uint32_t num_sec_windows = 0;
378*4882a593Smuzhiyun uint32_t num_windows = 0;
379*4882a593Smuzhiyun uint64_t min_addr, max_addr;
380*4882a593Smuzhiyun uint64_t size;
381*4882a593Smuzhiyun uint64_t subwin_size;
382*4882a593Smuzhiyun int sizebit;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun min_addr = find_min(tbl->start_addr, num_entries);
385*4882a593Smuzhiyun max_addr = find_max(tbl->end_addr, num_entries);
386*4882a593Smuzhiyun size = max_addr - min_addr + 1;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun if (!size)
389*4882a593Smuzhiyun return -1;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun sizebit = __ilog2_roundup_64(size);
392*4882a593Smuzhiyun size = 1 << sizebit;
393*4882a593Smuzhiyun debug("min start_addr is %llx\n", min_addr);
394*4882a593Smuzhiyun debug("max end_addr is %llx\n", max_addr);
395*4882a593Smuzhiyun debug("size found is %llx\n", size);
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun if (size < PAMU_PAGE_SIZE)
398*4882a593Smuzhiyun size = PAMU_PAGE_SIZE;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun while (1) {
401*4882a593Smuzhiyun min_addr = min_addr & ~(size - 1);
402*4882a593Smuzhiyun if (min_addr + size > max_addr)
403*4882a593Smuzhiyun break;
404*4882a593Smuzhiyun size <<= 1;
405*4882a593Smuzhiyun if (!size)
406*4882a593Smuzhiyun return -1;
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun debug("PAACT :Base addr is %llx\n", min_addr);
409*4882a593Smuzhiyun debug("PAACT : Size is %llx\n", size);
410*4882a593Smuzhiyun num_windows = get_win_cnt(size);
411*4882a593Smuzhiyun /* For a single window, no spaact entries are required
412*4882a593Smuzhiyun * sec_sub_window count = 0 */
413*4882a593Smuzhiyun if (num_windows > 1)
414*4882a593Smuzhiyun num_sec_windows = num_windows;
415*4882a593Smuzhiyun else
416*4882a593Smuzhiyun num_sec_windows = 0;
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun ret = pamu_config_ppaace(liodn, min_addr,
419*4882a593Smuzhiyun size , -1, -1, -1, num_sec_windows);
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun if (ret < 0)
422*4882a593Smuzhiyun return ret;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun debug("configured ppace\n");
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun if (num_sec_windows) {
427*4882a593Smuzhiyun subwin_size = size >> count_lsb_zeroes(num_sec_windows);
428*4882a593Smuzhiyun debug("subwin_size is %llx\n", subwin_size);
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun for (i = 0; i < num_entries; i++) {
431*4882a593Smuzhiyun ret = pamu_config_spaace(liodn,
432*4882a593Smuzhiyun subwin_size, tbl->start_addr[i] - min_addr,
433*4882a593Smuzhiyun tbl->size[i], -1, -1, -1);
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun if (ret < 0)
436*4882a593Smuzhiyun return ret;
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun return ret;
441*4882a593Smuzhiyun }
442