1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2000
3*4882a593Smuzhiyun * Subodh Nijsure, SkyStream Networks, snijsure@skystream.com
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <mpc8xx.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <asm/ppc.h>
12*4882a593Smuzhiyun
print_reginfo(void)13*4882a593Smuzhiyun void print_reginfo(void)
14*4882a593Smuzhiyun {
15*4882a593Smuzhiyun immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
16*4882a593Smuzhiyun memctl8xx_t __iomem *memctl = &immap->im_memctl;
17*4882a593Smuzhiyun sysconf8xx_t __iomem *sysconf = &immap->im_siu_conf;
18*4882a593Smuzhiyun sit8xx_t __iomem *timers = &immap->im_sit;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /* Hopefully more PowerPC knowledgable people will add code to display
21*4882a593Smuzhiyun * other useful registers
22*4882a593Smuzhiyun */
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun printf("\nSystem Configuration registers\n"
25*4882a593Smuzhiyun "\tIMMR\t0x%08X\n", get_immr(0));
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun printf("\tSIUMCR\t0x%08X", in_be32(&sysconf->sc_siumcr));
28*4882a593Smuzhiyun printf("\tSYPCR\t0x%08X\n", in_be32(&sysconf->sc_sypcr));
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun printf("\tSWT\t0x%08X", in_be32(&sysconf->sc_swt));
31*4882a593Smuzhiyun printf("\tSWSR\t0x%04X\n", in_be16(&sysconf->sc_swsr));
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X\n",
34*4882a593Smuzhiyun in_be32(&sysconf->sc_sipend), in_be32(&sysconf->sc_simask));
35*4882a593Smuzhiyun printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X\n",
36*4882a593Smuzhiyun in_be32(&sysconf->sc_siel), in_be32(&sysconf->sc_sivec));
37*4882a593Smuzhiyun printf("\tTESR\t0x%08X\tSDCR\t0x%08X\n",
38*4882a593Smuzhiyun in_be32(&sysconf->sc_tesr), in_be32(&sysconf->sc_sdcr));
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun printf("Memory Controller Registers\n");
41*4882a593Smuzhiyun printf("\tBR0\t0x%08X\tOR0\t0x%08X\n", in_be32(&memctl->memc_br0),
42*4882a593Smuzhiyun in_be32(&memctl->memc_or0));
43*4882a593Smuzhiyun printf("\tBR1\t0x%08X\tOR1\t0x%08X\n", in_be32(&memctl->memc_br1),
44*4882a593Smuzhiyun in_be32(&memctl->memc_or1));
45*4882a593Smuzhiyun printf("\tBR2\t0x%08X\tOR2\t0x%08X\n", in_be32(&memctl->memc_br2),
46*4882a593Smuzhiyun in_be32(&memctl->memc_or2));
47*4882a593Smuzhiyun printf("\tBR3\t0x%08X\tOR3\t0x%08X\n", in_be32(&memctl->memc_br3),
48*4882a593Smuzhiyun in_be32(&memctl->memc_or3));
49*4882a593Smuzhiyun printf("\tBR4\t0x%08X\tOR4\t0x%08X\n", in_be32(&memctl->memc_br4),
50*4882a593Smuzhiyun in_be32(&memctl->memc_or4));
51*4882a593Smuzhiyun printf("\tBR5\t0x%08X\tOR5\t0x%08X\n", in_be32(&memctl->memc_br5),
52*4882a593Smuzhiyun in_be32(&memctl->memc_or5));
53*4882a593Smuzhiyun printf("\tBR6\t0x%08X\tOR6\t0x%08X\n", in_be32(&memctl->memc_br6),
54*4882a593Smuzhiyun in_be32(&memctl->memc_or6));
55*4882a593Smuzhiyun printf("\tBR7\t0x%08X\tOR7\t0x%08X\n", in_be32(&memctl->memc_br7),
56*4882a593Smuzhiyun in_be32(&memctl->memc_or7));
57*4882a593Smuzhiyun printf("\n\tmamr\t0x%08X\tmbmr\t0x%08X\n", in_be32(&memctl->memc_mamr),
58*4882a593Smuzhiyun in_be32(&memctl->memc_mbmr));
59*4882a593Smuzhiyun printf("\tmstat\t0x%04X\tmptpr\t0x%04X\n", in_be16(&memctl->memc_mstat),
60*4882a593Smuzhiyun in_be16(&memctl->memc_mptpr));
61*4882a593Smuzhiyun printf("\tmdr\t0x%08X\n", in_be32(&memctl->memc_mdr));
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun printf("\nSystem Integration Timers\n");
64*4882a593Smuzhiyun printf("\tTBSCR\t0x%04X\tRTCSC\t0x%04X\n",
65*4882a593Smuzhiyun in_be16(&timers->sit_tbscr), in_be16(&timers->sit_rtcsc));
66*4882a593Smuzhiyun printf("\tPISCR\t0x%04X\n", in_be16(&timers->sit_piscr));
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /*
69*4882a593Smuzhiyun * May be some CPM info here?
70*4882a593Smuzhiyun */
71*4882a593Smuzhiyun }
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