xref: /OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc86xx/speed.c (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2004 Freescale Semiconductor.
3*4882a593Smuzhiyun  * Jeff Brown
4*4882a593Smuzhiyun  * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * (C) Copyright 2000-2002
7*4882a593Smuzhiyun  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <common.h>
13*4882a593Smuzhiyun #include <mpc86xx.h>
14*4882a593Smuzhiyun #include <asm/processor.h>
15*4882a593Smuzhiyun #include <asm/io.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun /* used in some defintiions of CONFIG_SYS_CLK_FREQ */
20*4882a593Smuzhiyun extern unsigned long get_board_sys_clk(unsigned long dummy);
21*4882a593Smuzhiyun 
get_sys_info(sys_info_t * sys_info)22*4882a593Smuzhiyun void get_sys_info(sys_info_t *sys_info)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun 	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
25*4882a593Smuzhiyun 	volatile ccsr_gur_t *gur = &immap->im_gur;
26*4882a593Smuzhiyun 	uint plat_ratio, e600_ratio;
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	plat_ratio = (gur->porpllsr) & 0x0000003e;
29*4882a593Smuzhiyun 	plat_ratio >>= 1;
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 	switch (plat_ratio) {
32*4882a593Smuzhiyun 	case 0x0:
33*4882a593Smuzhiyun 		sys_info->freq_systembus = 16 * CONFIG_SYS_CLK_FREQ;
34*4882a593Smuzhiyun 		break;
35*4882a593Smuzhiyun 	case 0x02:
36*4882a593Smuzhiyun 	case 0x03:
37*4882a593Smuzhiyun 	case 0x04:
38*4882a593Smuzhiyun 	case 0x05:
39*4882a593Smuzhiyun 	case 0x06:
40*4882a593Smuzhiyun 	case 0x08:
41*4882a593Smuzhiyun 	case 0x09:
42*4882a593Smuzhiyun 	case 0x0a:
43*4882a593Smuzhiyun 	case 0x0c:
44*4882a593Smuzhiyun 	case 0x10:
45*4882a593Smuzhiyun 		sys_info->freq_systembus = plat_ratio * CONFIG_SYS_CLK_FREQ;
46*4882a593Smuzhiyun 		break;
47*4882a593Smuzhiyun 	default:
48*4882a593Smuzhiyun 		sys_info->freq_systembus = 0;
49*4882a593Smuzhiyun 		break;
50*4882a593Smuzhiyun 	}
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	e600_ratio = (gur->porpllsr) & 0x003f0000;
53*4882a593Smuzhiyun 	e600_ratio >>= 16;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	switch (e600_ratio) {
56*4882a593Smuzhiyun 	case 0x10:
57*4882a593Smuzhiyun 		sys_info->freq_processor = 2 * sys_info->freq_systembus;
58*4882a593Smuzhiyun 		break;
59*4882a593Smuzhiyun 	case 0x19:
60*4882a593Smuzhiyun 		sys_info->freq_processor = 5 * sys_info->freq_systembus / 2;
61*4882a593Smuzhiyun 		break;
62*4882a593Smuzhiyun 	case 0x20:
63*4882a593Smuzhiyun 		sys_info->freq_processor = 3 * sys_info->freq_systembus;
64*4882a593Smuzhiyun 		break;
65*4882a593Smuzhiyun 	case 0x39:
66*4882a593Smuzhiyun 		sys_info->freq_processor = 7 * sys_info->freq_systembus / 2;
67*4882a593Smuzhiyun 		break;
68*4882a593Smuzhiyun 	case 0x28:
69*4882a593Smuzhiyun 		sys_info->freq_processor = 4 * sys_info->freq_systembus;
70*4882a593Smuzhiyun 		break;
71*4882a593Smuzhiyun 	case 0x1d:
72*4882a593Smuzhiyun 		sys_info->freq_processor = 9 * sys_info->freq_systembus / 2;
73*4882a593Smuzhiyun 		break;
74*4882a593Smuzhiyun 	default:
75*4882a593Smuzhiyun 		sys_info->freq_processor = e600_ratio +
76*4882a593Smuzhiyun 						sys_info->freq_systembus;
77*4882a593Smuzhiyun 		break;
78*4882a593Smuzhiyun 	}
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	sys_info->freq_localbus = sys_info->freq_systembus;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun /*
85*4882a593Smuzhiyun  * Measure CPU clock speed (core clock GCLK1, GCLK2)
86*4882a593Smuzhiyun  * (Approx. GCLK frequency in Hz)
87*4882a593Smuzhiyun  */
88*4882a593Smuzhiyun 
get_clocks(void)89*4882a593Smuzhiyun int get_clocks(void)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	sys_info_t sys_info;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	get_sys_info(&sys_info);
94*4882a593Smuzhiyun 	gd->cpu_clk = sys_info.freq_processor;
95*4882a593Smuzhiyun 	gd->bus_clk = sys_info.freq_systembus;
96*4882a593Smuzhiyun 	gd->arch.lbc_clk = sys_info.freq_localbus;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	/*
99*4882a593Smuzhiyun 	 * The base clock for I2C depends on the actual SOC.  Unfortunately,
100*4882a593Smuzhiyun 	 * there is no pattern that can be used to determine the frequency, so
101*4882a593Smuzhiyun 	 * the only choice is to look up the actual SOC number and use the value
102*4882a593Smuzhiyun 	 * for that SOC. This information is taken from application note
103*4882a593Smuzhiyun 	 * AN2919.
104*4882a593Smuzhiyun 	 */
105*4882a593Smuzhiyun #ifdef CONFIG_ARCH_MPC8610
106*4882a593Smuzhiyun 	gd->arch.i2c1_clk = sys_info.freq_systembus;
107*4882a593Smuzhiyun #else
108*4882a593Smuzhiyun 	gd->arch.i2c1_clk = sys_info.freq_systembus / 2;
109*4882a593Smuzhiyun #endif
110*4882a593Smuzhiyun 	gd->arch.i2c2_clk = gd->arch.i2c1_clk;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	if (gd->cpu_clk != 0)
113*4882a593Smuzhiyun 		return 0;
114*4882a593Smuzhiyun 	else
115*4882a593Smuzhiyun 		return 1;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun /*
120*4882a593Smuzhiyun  * get_bus_freq
121*4882a593Smuzhiyun  *	Return system bus freq in Hz
122*4882a593Smuzhiyun  */
123*4882a593Smuzhiyun 
get_bus_freq(ulong dummy)124*4882a593Smuzhiyun ulong get_bus_freq(ulong dummy)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun 	ulong val;
127*4882a593Smuzhiyun 	sys_info_t sys_info;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	get_sys_info(&sys_info);
130*4882a593Smuzhiyun 	val = sys_info.freq_systembus;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	return val;
133*4882a593Smuzhiyun }
134