1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * (C) Copyright 2006 3*4882a593Smuzhiyun * Wolfgang Denk, DENX Software Engineering, wd@denx.de 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2009 Freescale Semiconductor, Inc. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "config.h" 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunOUTPUT_ARCH(powerpc) 13*4882a593Smuzhiyun#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC 14*4882a593SmuzhiyunPHDRS 15*4882a593Smuzhiyun{ 16*4882a593Smuzhiyun text PT_LOAD; 17*4882a593Smuzhiyun bss PT_LOAD; 18*4882a593Smuzhiyun} 19*4882a593Smuzhiyun#endif 20*4882a593SmuzhiyunSECTIONS 21*4882a593Smuzhiyun{ 22*4882a593Smuzhiyun . = CONFIG_SPL_TEXT_BASE; 23*4882a593Smuzhiyun .text : { 24*4882a593Smuzhiyun *(.text*) 25*4882a593Smuzhiyun } 26*4882a593Smuzhiyun _etext = .; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun .reloc : { 29*4882a593Smuzhiyun _GOT2_TABLE_ = .; 30*4882a593Smuzhiyun KEEP(*(.got2)) 31*4882a593Smuzhiyun KEEP(*(.got)) 32*4882a593Smuzhiyun _FIXUP_TABLE_ = .; 33*4882a593Smuzhiyun KEEP(*(.fixup)) 34*4882a593Smuzhiyun } 35*4882a593Smuzhiyun __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; 36*4882a593Smuzhiyun __fixup_entries = (. - _FIXUP_TABLE_) >> 2; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun . = ALIGN(8); 39*4882a593Smuzhiyun .data : { 40*4882a593Smuzhiyun *(.rodata*) 41*4882a593Smuzhiyun *(.data*) 42*4882a593Smuzhiyun *(.sdata*) 43*4882a593Smuzhiyun } 44*4882a593Smuzhiyun _edata = .; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun . = ALIGN(4); 47*4882a593Smuzhiyun .u_boot_list : { 48*4882a593Smuzhiyun KEEP(*(SORT(.u_boot_list*))); 49*4882a593Smuzhiyun } 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun . = .; 52*4882a593Smuzhiyun __start___ex_table = .; 53*4882a593Smuzhiyun __ex_table : { *(__ex_table) } 54*4882a593Smuzhiyun __stop___ex_table = .; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun . = ALIGN(8); 57*4882a593Smuzhiyun __init_begin = .; 58*4882a593Smuzhiyun __init_end = .; 59*4882a593Smuzhiyun#ifdef CONFIG_SPL_SKIP_RELOCATE 60*4882a593Smuzhiyun . = ALIGN(4); 61*4882a593Smuzhiyun __bss_start = .; 62*4882a593Smuzhiyun .bss : { 63*4882a593Smuzhiyun *(.sbss*) 64*4882a593Smuzhiyun *(.bss*) 65*4882a593Smuzhiyun } 66*4882a593Smuzhiyun . = ALIGN(4); 67*4882a593Smuzhiyun __bss_end = .; 68*4882a593Smuzhiyun#endif 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */ 71*4882a593Smuzhiyun#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC 72*4882a593Smuzhiyun .bootpg ADDR(.text) - 0x1000 : 73*4882a593Smuzhiyun { 74*4882a593Smuzhiyun KEEP(*(.bootpg)) 75*4882a593Smuzhiyun } :text = 0xffff 76*4882a593Smuzhiyun#else 77*4882a593Smuzhiyun#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */ 78*4882a593Smuzhiyun#ifndef BOOT_PAGE_OFFSET 79*4882a593Smuzhiyun#define BOOT_PAGE_OFFSET 0x1000 80*4882a593Smuzhiyun#endif 81*4882a593Smuzhiyun .bootpg ADDR(.text) + BOOT_PAGE_OFFSET : 82*4882a593Smuzhiyun { 83*4882a593Smuzhiyun arch/powerpc/cpu/mpc85xx/start.o (.bootpg) 84*4882a593Smuzhiyun } 85*4882a593Smuzhiyun#ifndef RESET_VECTOR_OFFSET 86*4882a593Smuzhiyun#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */ 87*4882a593Smuzhiyun#endif 88*4882a593Smuzhiyun#elif defined(CONFIG_FSL_ELBC) 89*4882a593Smuzhiyun#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */ 90*4882a593Smuzhiyun#else 91*4882a593Smuzhiyun#error unknown NAND controller 92*4882a593Smuzhiyun#endif 93*4882a593Smuzhiyun .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : { 94*4882a593Smuzhiyun KEEP(*(.resetvec)) 95*4882a593Smuzhiyun } = 0xffff 96*4882a593Smuzhiyun#endif 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun#ifndef CONFIG_SPL_SKIP_RELOCATE 99*4882a593Smuzhiyun /* 100*4882a593Smuzhiyun * Make sure that the bss segment isn't linked at 0x0, otherwise its 101*4882a593Smuzhiyun * address won't be updated during relocation fixups. 102*4882a593Smuzhiyun */ 103*4882a593Smuzhiyun . |= 0x10; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun . = ALIGN(4); 106*4882a593Smuzhiyun __bss_start = .; 107*4882a593Smuzhiyun .bss : { 108*4882a593Smuzhiyun *(.sbss*) 109*4882a593Smuzhiyun *(.bss*) 110*4882a593Smuzhiyun } 111*4882a593Smuzhiyun . = ALIGN(4); 112*4882a593Smuzhiyun __bss_end = .; 113*4882a593Smuzhiyun#endif 114*4882a593Smuzhiyun} 115