1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * (C) Copyright 2006 3*4882a593Smuzhiyun * Wolfgang Denk, DENX Software Engineering, wd@denx.de 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2009 Freescale Semiconductor, Inc. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "config.h" 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunOUTPUT_ARCH(powerpc) 13*4882a593SmuzhiyunSECTIONS 14*4882a593Smuzhiyun{ 15*4882a593Smuzhiyun . = 0xfff00000; 16*4882a593Smuzhiyun .text : { 17*4882a593Smuzhiyun *(.text*) 18*4882a593Smuzhiyun } 19*4882a593Smuzhiyun _etext = .; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun .reloc : { 22*4882a593Smuzhiyun _GOT2_TABLE_ = .; 23*4882a593Smuzhiyun KEEP(*(.got2)) 24*4882a593Smuzhiyun KEEP(*(.got)) 25*4882a593Smuzhiyun _FIXUP_TABLE_ = .; 26*4882a593Smuzhiyun KEEP(*(.fixup)) 27*4882a593Smuzhiyun } 28*4882a593Smuzhiyun __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; 29*4882a593Smuzhiyun __fixup_entries = (. - _FIXUP_TABLE_) >> 2; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun . = ALIGN(8); 32*4882a593Smuzhiyun .data : { 33*4882a593Smuzhiyun *(.rodata*) 34*4882a593Smuzhiyun *(.data*) 35*4882a593Smuzhiyun *(.sdata*) 36*4882a593Smuzhiyun } 37*4882a593Smuzhiyun _edata = .; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun .u_boot_list : { 40*4882a593Smuzhiyun KEEP(*(SORT(.u_boot_list*))); 41*4882a593Smuzhiyun } 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun . = ALIGN(8); 44*4882a593Smuzhiyun __init_begin = .; 45*4882a593Smuzhiyun __init_end = .; 46*4882a593Smuzhiyun#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */ 47*4882a593Smuzhiyun .bootpg ADDR(.text) + 0x1000 : 48*4882a593Smuzhiyun { 49*4882a593Smuzhiyun start.o (.bootpg) 50*4882a593Smuzhiyun } 51*4882a593Smuzhiyun#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */ 52*4882a593Smuzhiyun#elif defined(CONFIG_FSL_ELBC) 53*4882a593Smuzhiyun#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */ 54*4882a593Smuzhiyun#else 55*4882a593Smuzhiyun#error unknown NAND controller 56*4882a593Smuzhiyun#endif 57*4882a593Smuzhiyun .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : { 58*4882a593Smuzhiyun KEEP(*(.resetvec)) 59*4882a593Smuzhiyun } = 0xffff 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun __bss_start = .; 62*4882a593Smuzhiyun .bss : { 63*4882a593Smuzhiyun *(.sbss*) 64*4882a593Smuzhiyun *(.bss*) 65*4882a593Smuzhiyun } 66*4882a593Smuzhiyun __bss_end = .; 67*4882a593Smuzhiyun} 68*4882a593SmuzhiyunASSERT(__init_end <= (0xfff00000 + RESET_VECTOR_OFFSET), "NAND bootstrap too big"); 69