xref: /OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc85xx/traps.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * linux/arch/powerpc/kernel/traps.c
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright 2007 Freescale Semiconductor.
5*4882a593Smuzhiyun  * Copyright (C) 2003 Motorola
6*4882a593Smuzhiyun  * Modified by Xianghua Xiao(x.xiao@motorola.com)
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Modified by Cort Dougan (cort@cs.nmt.edu)
11*4882a593Smuzhiyun  * and Paul Mackerras (paulus@cs.anu.edu.au)
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * (C) Copyright 2000
14*4882a593Smuzhiyun  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
17*4882a593Smuzhiyun  */
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun /*
20*4882a593Smuzhiyun  * This file handles the architecture-dependent parts of hardware exceptions
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include <common.h>
24*4882a593Smuzhiyun #include <command.h>
25*4882a593Smuzhiyun #include <kgdb.h>
26*4882a593Smuzhiyun #include <asm/processor.h>
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun /* Returns 0 if exception not found and fixup otherwise.  */
31*4882a593Smuzhiyun extern unsigned long search_exception_table(unsigned long);
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun /*
34*4882a593Smuzhiyun  * End of addressable memory.  This may be less than the actual
35*4882a593Smuzhiyun  * amount of memory on the system if we're unable to keep all
36*4882a593Smuzhiyun  * the memory mapped in.
37*4882a593Smuzhiyun  */
38*4882a593Smuzhiyun #define END_OF_MEM (gd->bd->bi_memstart + get_effective_memsize())
39*4882a593Smuzhiyun 
set_tsr(unsigned long val)40*4882a593Smuzhiyun static __inline__ void set_tsr(unsigned long val)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun 	asm volatile("mtspr 0x150, %0" : : "r" (val));
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun 
get_esr(void)45*4882a593Smuzhiyun static __inline__ unsigned long get_esr(void)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	unsigned long val;
48*4882a593Smuzhiyun 	asm volatile("mfspr %0, 0x03e" : "=r" (val) :);
49*4882a593Smuzhiyun 	return val;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #define ESR_MCI 0x80000000
53*4882a593Smuzhiyun #define ESR_PIL 0x08000000
54*4882a593Smuzhiyun #define ESR_PPR 0x04000000
55*4882a593Smuzhiyun #define ESR_PTR 0x02000000
56*4882a593Smuzhiyun #define ESR_DST 0x00800000
57*4882a593Smuzhiyun #define ESR_DIZ 0x00400000
58*4882a593Smuzhiyun #define ESR_U0F 0x00008000
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #if defined(CONFIG_CMD_BEDBUG)
61*4882a593Smuzhiyun extern void do_bedbug_breakpoint(struct pt_regs *);
62*4882a593Smuzhiyun #endif
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /*
65*4882a593Smuzhiyun  * Trap & Exception support
66*4882a593Smuzhiyun  */
67*4882a593Smuzhiyun 
print_backtrace(unsigned long * sp)68*4882a593Smuzhiyun static void print_backtrace(unsigned long *sp)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	int cnt = 0;
71*4882a593Smuzhiyun 	unsigned long i;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	printf("Call backtrace: ");
74*4882a593Smuzhiyun 	while (sp) {
75*4882a593Smuzhiyun 		if ((uint)sp > END_OF_MEM)
76*4882a593Smuzhiyun 			break;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 		i = sp[1];
79*4882a593Smuzhiyun 		if (cnt++ % 7 == 0)
80*4882a593Smuzhiyun 			printf("\n");
81*4882a593Smuzhiyun 		printf("%08lX ", i);
82*4882a593Smuzhiyun 		if (cnt > 32) break;
83*4882a593Smuzhiyun 		sp = (unsigned long *)*sp;
84*4882a593Smuzhiyun 	}
85*4882a593Smuzhiyun 	printf("\n");
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun 
show_regs(struct pt_regs * regs)88*4882a593Smuzhiyun void show_regs(struct pt_regs *regs)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	int i;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
93*4882a593Smuzhiyun 	       regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
94*4882a593Smuzhiyun 	printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
95*4882a593Smuzhiyun 	       regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
96*4882a593Smuzhiyun 	       regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
97*4882a593Smuzhiyun 	       regs->msr&MSR_IR ? 1 : 0,
98*4882a593Smuzhiyun 	       regs->msr&MSR_DR ? 1 : 0);
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	printf("\n");
101*4882a593Smuzhiyun 	for (i = 0;  i < 32;  i++) {
102*4882a593Smuzhiyun 		if ((i % 8) == 0)
103*4882a593Smuzhiyun 		{
104*4882a593Smuzhiyun 			printf("GPR%02d: ", i);
105*4882a593Smuzhiyun 		}
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 		printf("%08lX ", regs->gpr[i]);
108*4882a593Smuzhiyun 		if ((i % 8) == 7)
109*4882a593Smuzhiyun 		{
110*4882a593Smuzhiyun 			printf("\n");
111*4882a593Smuzhiyun 		}
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 
_exception(int signr,struct pt_regs * regs)116*4882a593Smuzhiyun static void _exception(int signr, struct pt_regs *regs)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun 	show_regs(regs);
119*4882a593Smuzhiyun 	print_backtrace((unsigned long *)regs->gpr[1]);
120*4882a593Smuzhiyun 	panic("Exception in kernel pc %lx signal %d",regs->nip,signr);
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
CritcalInputException(struct pt_regs * regs)123*4882a593Smuzhiyun void CritcalInputException(struct pt_regs *regs)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun 	panic("Critical Input Exception");
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun int machinecheck_count = 0;
129*4882a593Smuzhiyun int machinecheck_error = 0;
MachineCheckException(struct pt_regs * regs)130*4882a593Smuzhiyun void MachineCheckException(struct pt_regs *regs)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	unsigned long fixup;
133*4882a593Smuzhiyun 	unsigned int mcsr, mcsrr0, mcsrr1, mcar;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	/* Probing PCI using config cycles cause this exception
136*4882a593Smuzhiyun 	 * when a device is not present.  Catch it and return to
137*4882a593Smuzhiyun 	 * the PCI exception handler.
138*4882a593Smuzhiyun 	 */
139*4882a593Smuzhiyun 	if ((fixup = search_exception_table(regs->nip)) != 0) {
140*4882a593Smuzhiyun 		regs->nip = fixup;
141*4882a593Smuzhiyun 		return;
142*4882a593Smuzhiyun 	}
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	mcsrr0 = mfspr(SPRN_MCSRR0);
145*4882a593Smuzhiyun 	mcsrr1 = mfspr(SPRN_MCSRR1);
146*4882a593Smuzhiyun 	mcsr = mfspr(SPRN_MCSR);
147*4882a593Smuzhiyun 	mcar = mfspr(SPRN_MCAR);
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	machinecheck_count++;
150*4882a593Smuzhiyun 	machinecheck_error=1;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun #if defined(CONFIG_CMD_KGDB)
153*4882a593Smuzhiyun 	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
154*4882a593Smuzhiyun 		return;
155*4882a593Smuzhiyun #endif
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	printf("Machine check in kernel mode.\n");
158*4882a593Smuzhiyun 	printf("Caused by (from mcsr): ");
159*4882a593Smuzhiyun 	printf("mcsr = 0x%08x\n", mcsr);
160*4882a593Smuzhiyun 	if (mcsr & 0x80000000)
161*4882a593Smuzhiyun 		printf("Machine check input pin\n");
162*4882a593Smuzhiyun 	if (mcsr & 0x40000000)
163*4882a593Smuzhiyun 		printf("Instruction cache parity error\n");
164*4882a593Smuzhiyun 	if (mcsr & 0x20000000)
165*4882a593Smuzhiyun 		printf("Data cache push parity error\n");
166*4882a593Smuzhiyun 	if (mcsr & 0x10000000)
167*4882a593Smuzhiyun 		printf("Data cache parity error\n");
168*4882a593Smuzhiyun 	if (mcsr & 0x00000080)
169*4882a593Smuzhiyun 		printf("Bus instruction address error\n");
170*4882a593Smuzhiyun 	if (mcsr & 0x00000040)
171*4882a593Smuzhiyun 		printf("Bus Read address error\n");
172*4882a593Smuzhiyun 	if (mcsr & 0x00000020)
173*4882a593Smuzhiyun 		printf("Bus Write address error\n");
174*4882a593Smuzhiyun 	if (mcsr & 0x00000010)
175*4882a593Smuzhiyun 		printf("Bus Instruction data bus error\n");
176*4882a593Smuzhiyun 	if (mcsr & 0x00000008)
177*4882a593Smuzhiyun 		printf("Bus Read data bus error\n");
178*4882a593Smuzhiyun 	if (mcsr & 0x00000004)
179*4882a593Smuzhiyun 		printf("Bus Write bus error\n");
180*4882a593Smuzhiyun 	if (mcsr & 0x00000002)
181*4882a593Smuzhiyun 		printf("Bus Instruction parity error\n");
182*4882a593Smuzhiyun 	if (mcsr & 0x00000001)
183*4882a593Smuzhiyun 		printf("Bus Read parity error\n");
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	show_regs(regs);
186*4882a593Smuzhiyun 	printf("MCSR=0x%08x \tMCSRR0=0x%08x \nMCSRR1=0x%08x \tMCAR=0x%08x\n",
187*4882a593Smuzhiyun 	       mcsr, mcsrr0, mcsrr1, mcar);
188*4882a593Smuzhiyun 	print_backtrace((unsigned long *)regs->gpr[1]);
189*4882a593Smuzhiyun 	if (machinecheck_count > 10) {
190*4882a593Smuzhiyun 		panic("machine check count too high\n");
191*4882a593Smuzhiyun 	}
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	if (machinecheck_count > 1) {
194*4882a593Smuzhiyun 		regs->nip += 4; /* skip offending instruction */
195*4882a593Smuzhiyun 		printf("Skipping current instr, Returning to 0x%08lx\n",
196*4882a593Smuzhiyun 		       regs->nip);
197*4882a593Smuzhiyun 	} else {
198*4882a593Smuzhiyun 		printf("Returning back to 0x%08lx\n",regs->nip);
199*4882a593Smuzhiyun 	}
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun 
AlignmentException(struct pt_regs * regs)202*4882a593Smuzhiyun void AlignmentException(struct pt_regs *regs)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun #if defined(CONFIG_CMD_KGDB)
205*4882a593Smuzhiyun 	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
206*4882a593Smuzhiyun 		return;
207*4882a593Smuzhiyun #endif
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	show_regs(regs);
210*4882a593Smuzhiyun 	print_backtrace((unsigned long *)regs->gpr[1]);
211*4882a593Smuzhiyun 	panic("Alignment Exception");
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun 
ProgramCheckException(struct pt_regs * regs)214*4882a593Smuzhiyun void ProgramCheckException(struct pt_regs *regs)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun 	long esr_val;
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun #if defined(CONFIG_CMD_KGDB)
219*4882a593Smuzhiyun 	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
220*4882a593Smuzhiyun 		return;
221*4882a593Smuzhiyun #endif
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	show_regs(regs);
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	esr_val = get_esr();
226*4882a593Smuzhiyun 	if( esr_val & ESR_PIL )
227*4882a593Smuzhiyun 		printf( "** Illegal Instruction **\n" );
228*4882a593Smuzhiyun 	else if( esr_val & ESR_PPR )
229*4882a593Smuzhiyun 		printf( "** Privileged Instruction **\n" );
230*4882a593Smuzhiyun 	else if( esr_val & ESR_PTR )
231*4882a593Smuzhiyun 		printf( "** Trap Instruction **\n" );
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	print_backtrace((unsigned long *)regs->gpr[1]);
234*4882a593Smuzhiyun 	panic("Program Check Exception");
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun 
PITException(struct pt_regs * regs)237*4882a593Smuzhiyun void PITException(struct pt_regs *regs)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun 	/*
240*4882a593Smuzhiyun 	 * Reset PIT interrupt
241*4882a593Smuzhiyun 	 */
242*4882a593Smuzhiyun 	set_tsr(0x0c000000);
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	/*
245*4882a593Smuzhiyun 	 * Call timer_interrupt routine in interrupts.c
246*4882a593Smuzhiyun 	 */
247*4882a593Smuzhiyun 	timer_interrupt(NULL);
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun 
UnknownException(struct pt_regs * regs)250*4882a593Smuzhiyun void UnknownException(struct pt_regs *regs)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun #if defined(CONFIG_CMD_KGDB)
253*4882a593Smuzhiyun 	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
254*4882a593Smuzhiyun 		return;
255*4882a593Smuzhiyun #endif
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
258*4882a593Smuzhiyun 	       regs->nip, regs->msr, regs->trap);
259*4882a593Smuzhiyun 	_exception(0, regs);
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun 
ExtIntException(struct pt_regs * regs)262*4882a593Smuzhiyun void ExtIntException(struct pt_regs *regs)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun 	volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	uint vect;
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun #if defined(CONFIG_CMD_KGDB)
269*4882a593Smuzhiyun 	if (debugger_exception_handler && (*debugger_exception_handler)(regs))
270*4882a593Smuzhiyun 		return;
271*4882a593Smuzhiyun #endif
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx",
274*4882a593Smuzhiyun 	       regs->nip, regs->msr, regs->trap);
275*4882a593Smuzhiyun 	vect = pic->iack0;
276*4882a593Smuzhiyun 	printf(" irq IACK0@%05x=%d\n",(int)&pic->iack0,vect);
277*4882a593Smuzhiyun 	show_regs(regs);
278*4882a593Smuzhiyun 	print_backtrace((unsigned long *)regs->gpr[1]);
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun 
DebugException(struct pt_regs * regs)281*4882a593Smuzhiyun void DebugException(struct pt_regs *regs)
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun 	printf("Debugger trap at @ %lx\n", regs->nip );
284*4882a593Smuzhiyun 	show_regs(regs);
285*4882a593Smuzhiyun #if defined(CONFIG_CMD_BEDBUG)
286*4882a593Smuzhiyun 	do_bedbug_breakpoint( regs );
287*4882a593Smuzhiyun #endif
288*4882a593Smuzhiyun }
289