1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2010-2011 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun * Author: Roy Zang <tie-fei.zang@freescale.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <config.h>
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <asm/immap_85xx.h>
12*4882a593Smuzhiyun #include <asm/fsl_serdes.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define SRDS1_MAX_LANES 4
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun static u32 serdes1_prtcl_map;
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
19*4882a593Smuzhiyun [0x00] = {PCIE1, PCIE2, NONE, NONE},
20*4882a593Smuzhiyun [0x01] = {PCIE1, PCIE2, PCIE3, NONE},
21*4882a593Smuzhiyun [0x02] = {PCIE1, PCIE2, PCIE3, SGMII_FM1_DTSEC2},
22*4882a593Smuzhiyun [0x03] = {PCIE1, PCIE2, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2},
23*4882a593Smuzhiyun };
24*4882a593Smuzhiyun
is_serdes_configured(enum srds_prtcl device)25*4882a593Smuzhiyun int is_serdes_configured(enum srds_prtcl device)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun int ret;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun if (!(serdes1_prtcl_map & (1 << NONE)))
30*4882a593Smuzhiyun fsl_serdes_init();
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun ret = (1 << device) & serdes1_prtcl_map;
33*4882a593Smuzhiyun return ret;
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
fsl_serdes_init(void)36*4882a593Smuzhiyun void fsl_serdes_init(void)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
39*4882a593Smuzhiyun u32 pordevsr = in_be32(&gur->pordevsr);
40*4882a593Smuzhiyun u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
41*4882a593Smuzhiyun MPC85xx_PORDEVSR_IO_SEL_SHIFT;
42*4882a593Smuzhiyun int lane;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun if (serdes1_prtcl_map & (1 << NONE))
45*4882a593Smuzhiyun return;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
50*4882a593Smuzhiyun printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
51*4882a593Smuzhiyun return;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
54*4882a593Smuzhiyun enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
55*4882a593Smuzhiyun serdes1_prtcl_map |= (1 << lane_prtcl);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* Set the first bit to indicate serdes has been initialized */
59*4882a593Smuzhiyun serdes1_prtcl_map |= (1 << NONE);
60*4882a593Smuzhiyun }
61