1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2010 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun * Author: Timur Tabi <timur@freescale.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <config.h>
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <asm/immap_85xx.h>
12*4882a593Smuzhiyun #include <asm/fsl_serdes.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define SRDS1_MAX_LANES 4
15*4882a593Smuzhiyun #define SRDS2_MAX_LANES 2
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun static u32 serdes1_prtcl_map, serdes2_prtcl_map;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
20*4882a593Smuzhiyun [0x00] = {NONE, NONE, NONE, NONE},
21*4882a593Smuzhiyun [0x01] = {NONE, NONE, NONE, NONE},
22*4882a593Smuzhiyun [0x02] = {NONE, NONE, NONE, NONE},
23*4882a593Smuzhiyun [0x03] = {NONE, NONE, NONE, NONE},
24*4882a593Smuzhiyun [0x04] = {NONE, NONE, NONE, NONE},
25*4882a593Smuzhiyun [0x06] = {PCIE1, PCIE3, SGMII_TSEC1, PCIE2},
26*4882a593Smuzhiyun [0x07] = {PCIE1, PCIE3, SGMII_TSEC1, PCIE2},
27*4882a593Smuzhiyun [0x09] = {PCIE1, NONE, NONE, NONE},
28*4882a593Smuzhiyun [0x0a] = {PCIE1, PCIE3, SGMII_TSEC1, SGMII_TSEC2},
29*4882a593Smuzhiyun [0x0b] = {PCIE1, PCIE3, SGMII_TSEC1, SGMII_TSEC2},
30*4882a593Smuzhiyun [0x0d] = {PCIE1, PCIE1, SGMII_TSEC1, SGMII_TSEC2},
31*4882a593Smuzhiyun [0x0e] = {PCIE1, PCIE1, SGMII_TSEC1, SGMII_TSEC2},
32*4882a593Smuzhiyun [0x0f] = {PCIE1, PCIE1, SGMII_TSEC1, SGMII_TSEC2},
33*4882a593Smuzhiyun [0x15] = {PCIE1, PCIE3, PCIE2, PCIE2},
34*4882a593Smuzhiyun [0x16] = {PCIE1, PCIE3, PCIE2, PCIE2},
35*4882a593Smuzhiyun [0x17] = {PCIE1, PCIE3, PCIE2, PCIE2},
36*4882a593Smuzhiyun [0x18] = {PCIE1, PCIE1, PCIE2, PCIE2},
37*4882a593Smuzhiyun [0x19] = {PCIE1, PCIE1, PCIE2, PCIE2},
38*4882a593Smuzhiyun [0x1a] = {PCIE1, PCIE1, PCIE2, PCIE2},
39*4882a593Smuzhiyun [0x1b] = {PCIE1, PCIE1, PCIE2, PCIE2},
40*4882a593Smuzhiyun [0x1c] = {PCIE1, PCIE1, PCIE1, PCIE1},
41*4882a593Smuzhiyun [0x1d] = {PCIE1, PCIE1, PCIE2, PCIE2},
42*4882a593Smuzhiyun [0x1e] = {PCIE1, PCIE1, PCIE2, PCIE2},
43*4882a593Smuzhiyun [0x1f] = {PCIE1, PCIE1, PCIE2, PCIE2},
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
47*4882a593Smuzhiyun [0x00] = {PCIE3, PCIE3},
48*4882a593Smuzhiyun [0x01] = {PCIE2, PCIE3},
49*4882a593Smuzhiyun [0x02] = {SATA1, SATA2},
50*4882a593Smuzhiyun [0x03] = {SGMII_TSEC1, SGMII_TSEC2},
51*4882a593Smuzhiyun [0x04] = {NONE, NONE},
52*4882a593Smuzhiyun [0x06] = {SATA1, SATA2},
53*4882a593Smuzhiyun [0x07] = {NONE, NONE},
54*4882a593Smuzhiyun [0x09] = {PCIE3, PCIE2},
55*4882a593Smuzhiyun [0x0a] = {SATA1, SATA2},
56*4882a593Smuzhiyun [0x0b] = {NONE, NONE},
57*4882a593Smuzhiyun [0x0d] = {PCIE3, PCIE2},
58*4882a593Smuzhiyun [0x0e] = {SATA1, SATA2},
59*4882a593Smuzhiyun [0x0f] = {NONE, NONE},
60*4882a593Smuzhiyun [0x15] = {SGMII_TSEC1, SGMII_TSEC2},
61*4882a593Smuzhiyun [0x16] = {SATA1, SATA2},
62*4882a593Smuzhiyun [0x17] = {NONE, NONE},
63*4882a593Smuzhiyun [0x18] = {PCIE3, PCIE3},
64*4882a593Smuzhiyun [0x19] = {SGMII_TSEC1, SGMII_TSEC2},
65*4882a593Smuzhiyun [0x1a] = {SATA1, SATA2},
66*4882a593Smuzhiyun [0x1b] = {NONE, NONE},
67*4882a593Smuzhiyun [0x1c] = {PCIE3, PCIE3},
68*4882a593Smuzhiyun [0x1d] = {SGMII_TSEC1, SGMII_TSEC2},
69*4882a593Smuzhiyun [0x1e] = {SATA1, SATA2},
70*4882a593Smuzhiyun [0x1f] = {NONE, NONE},
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun
is_serdes_configured(enum srds_prtcl device)73*4882a593Smuzhiyun int is_serdes_configured(enum srds_prtcl device)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun int ret;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun if (!(serdes1_prtcl_map & (1 << NONE)))
78*4882a593Smuzhiyun fsl_serdes_init();
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun ret = (1 << device) & serdes1_prtcl_map;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun if (ret)
83*4882a593Smuzhiyun return ret;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun if (!(serdes2_prtcl_map & (1 << NONE)))
86*4882a593Smuzhiyun fsl_serdes_init();
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return (1 << device) & serdes2_prtcl_map;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
fsl_serdes_init(void)91*4882a593Smuzhiyun void fsl_serdes_init(void)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
94*4882a593Smuzhiyun u32 pordevsr = in_be32(&gur->pordevsr);
95*4882a593Smuzhiyun u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
96*4882a593Smuzhiyun MPC85xx_PORDEVSR_IO_SEL_SHIFT;
97*4882a593Smuzhiyun int lane;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun if (serdes1_prtcl_map & (1 << NONE) &&
100*4882a593Smuzhiyun serdes2_prtcl_map & (1 << NONE))
101*4882a593Smuzhiyun return;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
106*4882a593Smuzhiyun printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
107*4882a593Smuzhiyun return;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
110*4882a593Smuzhiyun enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
111*4882a593Smuzhiyun serdes1_prtcl_map |= (1 << lane_prtcl);
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun /* Set the first bit to indicate serdes has been initialized */
115*4882a593Smuzhiyun serdes1_prtcl_map |= (1 << NONE);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
118*4882a593Smuzhiyun printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
119*4882a593Smuzhiyun return;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
123*4882a593Smuzhiyun enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
124*4882a593Smuzhiyun serdes2_prtcl_map |= (1 << lane_prtcl);
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /* Set the first bit to indicate serdes has been initialized */
128*4882a593Smuzhiyun serdes2_prtcl_map |= (1 << NONE);
129*4882a593Smuzhiyun }
130