xref: /OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc85xx/b4860_ids.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2012 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <asm/fsl_portals.h>
9*4882a593Smuzhiyun #include <asm/fsl_liodn.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifdef CONFIG_SYS_DPAA_QBMAN
12*4882a593Smuzhiyun struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
13*4882a593Smuzhiyun 	/* dqrr liodn, frame data liodn, liodn off, sdest */
14*4882a593Smuzhiyun 	SET_QP_INFO(1, 27, 1, 0),
15*4882a593Smuzhiyun 	SET_QP_INFO(2, 28, 1, 0),
16*4882a593Smuzhiyun 	SET_QP_INFO(3, 29, 1, 1),
17*4882a593Smuzhiyun 	SET_QP_INFO(4, 30, 1, 1),
18*4882a593Smuzhiyun 	SET_QP_INFO(5, 31, 1, 2),
19*4882a593Smuzhiyun 	SET_QP_INFO(6, 32, 1, 2),
20*4882a593Smuzhiyun 	SET_QP_INFO(7, 33, 1, 3),
21*4882a593Smuzhiyun 	SET_QP_INFO(8, 34, 1, 3),
22*4882a593Smuzhiyun 	SET_QP_INFO(9, 35, 1, 0),
23*4882a593Smuzhiyun 	SET_QP_INFO(10, 36, 1, 0),
24*4882a593Smuzhiyun 	SET_QP_INFO(11, 37, 1, 1),
25*4882a593Smuzhiyun 	SET_QP_INFO(12, 38, 1, 1),
26*4882a593Smuzhiyun 	SET_QP_INFO(13, 39, 1, 2),
27*4882a593Smuzhiyun 	SET_QP_INFO(14, 40, 1, 2),
28*4882a593Smuzhiyun 	SET_QP_INFO(15, 41, 1, 3),
29*4882a593Smuzhiyun 	SET_QP_INFO(16, 42, 1, 3),
30*4882a593Smuzhiyun 	SET_QP_INFO(17, 43, 1, 0),
31*4882a593Smuzhiyun 	SET_QP_INFO(18, 44, 1, 0),
32*4882a593Smuzhiyun 	SET_QP_INFO(19, 45, 1, 1),
33*4882a593Smuzhiyun 	SET_QP_INFO(20, 46, 1, 1),
34*4882a593Smuzhiyun 	SET_QP_INFO(21, 47, 1, 2),
35*4882a593Smuzhiyun 	SET_QP_INFO(22, 48, 1, 2),
36*4882a593Smuzhiyun 	SET_QP_INFO(23, 49, 1, 3),
37*4882a593Smuzhiyun 	SET_QP_INFO(24, 50, 1, 3),
38*4882a593Smuzhiyun 	SET_QP_INFO(25, 51, 1, 0),
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun #endif
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #ifdef CONFIG_SYS_SRIO
43*4882a593Smuzhiyun struct srio_liodn_id_table srio_liodn_tbl[] = {
44*4882a593Smuzhiyun 	SET_SRIO_LIODN_BASE(1, 307),
45*4882a593Smuzhiyun 	SET_SRIO_LIODN_BASE(2, 387),
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
48*4882a593Smuzhiyun #endif
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun struct liodn_id_table liodn_tbl[] = {
51*4882a593Smuzhiyun #ifdef CONFIG_SYS_DPAA_QBMAN
52*4882a593Smuzhiyun 	SET_QMAN_LIODN(62),
53*4882a593Smuzhiyun 	SET_BMAN_LIODN(63),
54*4882a593Smuzhiyun #endif
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	SET_SDHC_LIODN(1, 552),
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	SET_USB_LIODN(1, "fsl-usb2-dr", 553),
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	SET_PCI_LIODN_BASE(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 148),
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	SET_DMA_LIODN(1, "fsl,elo3-dma", 147),
63*4882a593Smuzhiyun 	SET_DMA_LIODN(2, "fsl,elo3-dma", 227),
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #ifndef CONFIG_ARCH_B4420
66*4882a593Smuzhiyun 	SET_GUTS_LIODN("fsl,rapidio-delta", 199, rio1liodnr, 0),
67*4882a593Smuzhiyun 	SET_GUTS_LIODN(NULL, 200, rio2liodnr, 0),
68*4882a593Smuzhiyun 	SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0),
69*4882a593Smuzhiyun 	SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0),
70*4882a593Smuzhiyun #endif
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	/* SET_NEXUS_LIODN(557), -- not yet implemented */
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #ifdef CONFIG_SYS_DPAA_FMAN
77*4882a593Smuzhiyun struct fman_liodn_id_table fman1_liodn_tbl[] = {
78*4882a593Smuzhiyun 	SET_FMAN_RX_1G_LIODN(1, 0, 88),
79*4882a593Smuzhiyun 	SET_FMAN_RX_1G_LIODN(1, 1, 89),
80*4882a593Smuzhiyun 	SET_FMAN_RX_1G_LIODN(1, 2, 90),
81*4882a593Smuzhiyun 	SET_FMAN_RX_1G_LIODN(1, 3, 91),
82*4882a593Smuzhiyun 	SET_FMAN_RX_1G_LIODN(1, 4, 92),
83*4882a593Smuzhiyun 	SET_FMAN_RX_1G_LIODN(1, 5, 93),
84*4882a593Smuzhiyun #ifndef CONFIG_ARCH_B4420
85*4882a593Smuzhiyun 	SET_FMAN_RX_10G_LIODN(1, 0, 94),
86*4882a593Smuzhiyun 	SET_FMAN_RX_10G_LIODN(1, 1, 95),
87*4882a593Smuzhiyun #endif
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
90*4882a593Smuzhiyun #endif
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun struct liodn_id_table sec_liodn_tbl[] = {
93*4882a593Smuzhiyun 	SET_SEC_JR_LIODN_ENTRY(0, 454, 458),
94*4882a593Smuzhiyun 	SET_SEC_JR_LIODN_ENTRY(1, 455, 459),
95*4882a593Smuzhiyun 	SET_SEC_JR_LIODN_ENTRY(2, 456, 460),
96*4882a593Smuzhiyun 	SET_SEC_JR_LIODN_ENTRY(3, 457, 461),
97*4882a593Smuzhiyun 	SET_SEC_RTIC_LIODN_ENTRY(a, 453),
98*4882a593Smuzhiyun 	SET_SEC_RTIC_LIODN_ENTRY(b, 549),
99*4882a593Smuzhiyun 	SET_SEC_RTIC_LIODN_ENTRY(c, 550),
100*4882a593Smuzhiyun 	SET_SEC_RTIC_LIODN_ENTRY(d, 551),
101*4882a593Smuzhiyun 	SET_SEC_DECO_LIODN_ENTRY(0, 541, 610),
102*4882a593Smuzhiyun 	SET_SEC_DECO_LIODN_ENTRY(1, 542, 611),
103*4882a593Smuzhiyun 	SET_SEC_DECO_LIODN_ENTRY(2, 543, 612),
104*4882a593Smuzhiyun 	SET_SEC_DECO_LIODN_ENTRY(3, 544, 613),
105*4882a593Smuzhiyun 	SET_SEC_DECO_LIODN_ENTRY(4, 545, 614),
106*4882a593Smuzhiyun 	SET_SEC_DECO_LIODN_ENTRY(5, 546, 615),
107*4882a593Smuzhiyun 	SET_SEC_DECO_LIODN_ENTRY(6, 547, 616),
108*4882a593Smuzhiyun 	SET_SEC_DECO_LIODN_ENTRY(7, 548, 617),
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun #ifdef CONFIG_SYS_DPAA_RMAN
113*4882a593Smuzhiyun struct liodn_id_table rman_liodn_tbl[] = {
114*4882a593Smuzhiyun 	/* Set RMan block 0-3 liodn offset */
115*4882a593Smuzhiyun 	SET_RMAN_LIODN(0, 6),
116*4882a593Smuzhiyun 	SET_RMAN_LIODN(1, 7),
117*4882a593Smuzhiyun 	SET_RMAN_LIODN(2, 8),
118*4882a593Smuzhiyun 	SET_RMAN_LIODN(3, 9),
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);
121*4882a593Smuzhiyun #endif
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun struct liodn_id_table liodn_bases[] = {
124*4882a593Smuzhiyun 	[FSL_HW_PORTAL_SEC]  = SET_LIODN_BASE_2(462, 558),
125*4882a593Smuzhiyun #ifdef CONFIG_SYS_DPAA_FMAN
126*4882a593Smuzhiyun 	[FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(973),
127*4882a593Smuzhiyun #endif
128*4882a593Smuzhiyun #ifdef CONFIG_SYS_DPAA_RMAN
129*4882a593Smuzhiyun 	[FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(922),
130*4882a593Smuzhiyun #endif
131*4882a593Smuzhiyun };
132