1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2006 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Dave Liu <daveliu@freescale.com>
5*4882a593Smuzhiyun * based on source code of Shlomi Gridish
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <linux/errno.h>
12*4882a593Smuzhiyun #include <asm/io.h>
13*4882a593Smuzhiyun #include <asm/immap_83xx.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define NUM_OF_PINS 32
qe_config_iopin(u8 port,u8 pin,int dir,int open_drain,int assign)16*4882a593Smuzhiyun void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun u32 pin_2bit_mask;
19*4882a593Smuzhiyun u32 pin_2bit_dir;
20*4882a593Smuzhiyun u32 pin_2bit_assign;
21*4882a593Smuzhiyun u32 pin_1bit_mask;
22*4882a593Smuzhiyun u32 tmp_val;
23*4882a593Smuzhiyun volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR;
24*4882a593Smuzhiyun volatile qepio83xx_t *par_io = (volatile qepio83xx_t *)&im->qepio;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* Calculate pin location and 2bit mask and dir */
27*4882a593Smuzhiyun pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2));
28*4882a593Smuzhiyun pin_2bit_dir = (u32)(dir << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2));
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /* Setup the direction */
31*4882a593Smuzhiyun tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? \
32*4882a593Smuzhiyun in_be32(&par_io->ioport[port].dir2) :
33*4882a593Smuzhiyun in_be32(&par_io->ioport[port].dir1);
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun if (pin > (NUM_OF_PINS/2) -1) {
36*4882a593Smuzhiyun out_be32(&par_io->ioport[port].dir2, ~pin_2bit_mask & tmp_val);
37*4882a593Smuzhiyun out_be32(&par_io->ioport[port].dir2, pin_2bit_dir | tmp_val);
38*4882a593Smuzhiyun } else {
39*4882a593Smuzhiyun out_be32(&par_io->ioport[port].dir1, ~pin_2bit_mask & tmp_val);
40*4882a593Smuzhiyun out_be32(&par_io->ioport[port].dir1, pin_2bit_dir | tmp_val);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* Calculate pin location for 1bit mask */
44*4882a593Smuzhiyun pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1)));
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /* Setup the open drain */
47*4882a593Smuzhiyun tmp_val = in_be32(&par_io->ioport[port].podr);
48*4882a593Smuzhiyun if (open_drain) {
49*4882a593Smuzhiyun out_be32(&par_io->ioport[port].podr, pin_1bit_mask | tmp_val);
50*4882a593Smuzhiyun } else {
51*4882a593Smuzhiyun out_be32(&par_io->ioport[port].podr, ~pin_1bit_mask & tmp_val);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* Setup the assignment */
55*4882a593Smuzhiyun tmp_val = (pin > (NUM_OF_PINS/2) - 1) ?
56*4882a593Smuzhiyun in_be32(&par_io->ioport[port].ppar2):
57*4882a593Smuzhiyun in_be32(&par_io->ioport[port].ppar1);
58*4882a593Smuzhiyun pin_2bit_assign = (u32)(assign
59*4882a593Smuzhiyun << (NUM_OF_PINS - (pin%(NUM_OF_PINS/2)+1)*2));
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* Clear and set 2 bits mask */
62*4882a593Smuzhiyun if (pin > (NUM_OF_PINS/2) - 1) {
63*4882a593Smuzhiyun out_be32(&par_io->ioport[port].ppar2, ~pin_2bit_mask & tmp_val);
64*4882a593Smuzhiyun out_be32(&par_io->ioport[port].ppar2, pin_2bit_assign | tmp_val);
65*4882a593Smuzhiyun } else {
66*4882a593Smuzhiyun out_be32(&par_io->ioport[port].ppar1, ~pin_2bit_mask & tmp_val);
67*4882a593Smuzhiyun out_be32(&par_io->ioport[port].ppar1, pin_2bit_assign | tmp_val);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun }
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