1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 1985 MIPS Computer Systems, Inc. 3*4882a593Smuzhiyun * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle 4*4882a593Smuzhiyun * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc. 5*4882a593Smuzhiyun * Copyright (C) 2011 Wind River Systems, 6*4882a593Smuzhiyun * written by Ralf Baechle <ralf@linux-mips.org> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun #ifndef _ASM_REGDEF_H 11*4882a593Smuzhiyun #define _ASM_REGDEF_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <asm/sgidefs.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #if _MIPS_SIM == _MIPS_SIM_ABI32 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* 18*4882a593Smuzhiyun * Symbolic register names for 32 bit ABI 19*4882a593Smuzhiyun */ 20*4882a593Smuzhiyun #define zero $0 /* wired zero */ 21*4882a593Smuzhiyun #define AT $1 /* assembler temp - uppercase because of ".set at" */ 22*4882a593Smuzhiyun #define v0 $2 /* return value */ 23*4882a593Smuzhiyun #define v1 $3 24*4882a593Smuzhiyun #define a0 $4 /* argument registers */ 25*4882a593Smuzhiyun #define a1 $5 26*4882a593Smuzhiyun #define a2 $6 27*4882a593Smuzhiyun #define a3 $7 28*4882a593Smuzhiyun #define t0 $8 /* caller saved */ 29*4882a593Smuzhiyun #define t1 $9 30*4882a593Smuzhiyun #define t2 $10 31*4882a593Smuzhiyun #define t3 $11 32*4882a593Smuzhiyun #define t4 $12 33*4882a593Smuzhiyun #define ta0 $12 34*4882a593Smuzhiyun #define t5 $13 35*4882a593Smuzhiyun #define ta1 $13 36*4882a593Smuzhiyun #define t6 $14 37*4882a593Smuzhiyun #define ta2 $14 38*4882a593Smuzhiyun #define t7 $15 39*4882a593Smuzhiyun #define ta3 $15 40*4882a593Smuzhiyun #define s0 $16 /* callee saved */ 41*4882a593Smuzhiyun #define s1 $17 42*4882a593Smuzhiyun #define s2 $18 43*4882a593Smuzhiyun #define s3 $19 44*4882a593Smuzhiyun #define s4 $20 45*4882a593Smuzhiyun #define s5 $21 46*4882a593Smuzhiyun #define s6 $22 47*4882a593Smuzhiyun #define s7 $23 48*4882a593Smuzhiyun #define t8 $24 /* caller saved */ 49*4882a593Smuzhiyun #define t9 $25 50*4882a593Smuzhiyun #define jp $25 /* PIC jump register */ 51*4882a593Smuzhiyun #define k0 $26 /* kernel scratch */ 52*4882a593Smuzhiyun #define k1 $27 53*4882a593Smuzhiyun #define gp $28 /* global pointer */ 54*4882a593Smuzhiyun #define sp $29 /* stack pointer */ 55*4882a593Smuzhiyun #define fp $30 /* frame pointer */ 56*4882a593Smuzhiyun #define s8 $30 /* same like fp! */ 57*4882a593Smuzhiyun #define ra $31 /* return address */ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun #define zero $0 /* wired zero */ 64*4882a593Smuzhiyun #define AT $at /* assembler temp - uppercase because of ".set at" */ 65*4882a593Smuzhiyun #define v0 $2 /* return value - caller saved */ 66*4882a593Smuzhiyun #define v1 $3 67*4882a593Smuzhiyun #define a0 $4 /* argument registers */ 68*4882a593Smuzhiyun #define a1 $5 69*4882a593Smuzhiyun #define a2 $6 70*4882a593Smuzhiyun #define a3 $7 71*4882a593Smuzhiyun #define a4 $8 /* arg reg 64 bit; caller saved in 32 bit */ 72*4882a593Smuzhiyun #define ta0 $8 73*4882a593Smuzhiyun #define a5 $9 74*4882a593Smuzhiyun #define ta1 $9 75*4882a593Smuzhiyun #define a6 $10 76*4882a593Smuzhiyun #define ta2 $10 77*4882a593Smuzhiyun #define a7 $11 78*4882a593Smuzhiyun #define ta3 $11 79*4882a593Smuzhiyun #define t0 $12 /* caller saved */ 80*4882a593Smuzhiyun #define t1 $13 81*4882a593Smuzhiyun #define t2 $14 82*4882a593Smuzhiyun #define t3 $15 83*4882a593Smuzhiyun #define s0 $16 /* callee saved */ 84*4882a593Smuzhiyun #define s1 $17 85*4882a593Smuzhiyun #define s2 $18 86*4882a593Smuzhiyun #define s3 $19 87*4882a593Smuzhiyun #define s4 $20 88*4882a593Smuzhiyun #define s5 $21 89*4882a593Smuzhiyun #define s6 $22 90*4882a593Smuzhiyun #define s7 $23 91*4882a593Smuzhiyun #define t8 $24 /* caller saved */ 92*4882a593Smuzhiyun #define t9 $25 /* callee address for PIC/temp */ 93*4882a593Smuzhiyun #define jp $25 /* PIC jump register */ 94*4882a593Smuzhiyun #define k0 $26 /* kernel temporary */ 95*4882a593Smuzhiyun #define k1 $27 96*4882a593Smuzhiyun #define gp $28 /* global pointer - caller saved for PIC */ 97*4882a593Smuzhiyun #define sp $29 /* stack pointer */ 98*4882a593Smuzhiyun #define fp $30 /* frame pointer */ 99*4882a593Smuzhiyun #define s8 $30 /* callee saved */ 100*4882a593Smuzhiyun #define ra $31 /* return address */ 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */ 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun #endif /* _ASM_REGDEF_H */ 105