xref: /OK3568_Linux_fs/u-boot/arch/mips/include/asm/processor.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 1994 Waldorf GMBH
3*4882a593Smuzhiyun  * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
4*4882a593Smuzhiyun  * Copyright (C) 1996 Paul M. Antoine
5*4882a593Smuzhiyun  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun #ifndef _ASM_PROCESSOR_H
10*4882a593Smuzhiyun #define _ASM_PROCESSOR_H
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <asm/isadep.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <asm/cachectl.h>
15*4882a593Smuzhiyun #include <asm/mipsregs.h>
16*4882a593Smuzhiyun #include <asm/reg.h>
17*4882a593Smuzhiyun #include <asm/system.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun /*
20*4882a593Smuzhiyun  * Return current * instruction pointer ("program counter").
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun #define current_text_addr() ({ __label__ _l; _l: &&_l;})
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /*
25*4882a593Smuzhiyun  * System setup and hardware flags..
26*4882a593Smuzhiyun  */
27*4882a593Smuzhiyun extern void (*cpu_wait)(void);
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun extern unsigned int vced_count, vcei_count;
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define NUM_FPU_REGS	32
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun typedef __u64 fpureg_t;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun /*
36*4882a593Smuzhiyun  * It would be nice to add some more fields for emulator statistics, but there
37*4882a593Smuzhiyun  * are a number of fixed offsets in offset.h and elsewhere that would have to
38*4882a593Smuzhiyun  * be recalculated by hand.  So the additional information will be private to
39*4882a593Smuzhiyun  * the FPU emulator for now.  See asm-mips/fpu_emulator.h.
40*4882a593Smuzhiyun  */
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun struct mips_fpu_struct {
43*4882a593Smuzhiyun 	fpureg_t	fpr[NUM_FPU_REGS];
44*4882a593Smuzhiyun 	unsigned int	fcr31;
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define NUM_DSP_REGS   6
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun typedef __u32 dspreg_t;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun struct mips_dsp_state {
52*4882a593Smuzhiyun 	dspreg_t        dspr[NUM_DSP_REGS];
53*4882a593Smuzhiyun 	unsigned int    dspcontrol;
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun typedef struct {
57*4882a593Smuzhiyun 	unsigned long seg;
58*4882a593Smuzhiyun } mm_segment_t;
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #define ARCH_MIN_TASKALIGN	8
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun struct mips_abi;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /*
65*4882a593Smuzhiyun  * If you change thread_struct remember to change the #defines below too!
66*4882a593Smuzhiyun  */
67*4882a593Smuzhiyun struct thread_struct {
68*4882a593Smuzhiyun 	/* Saved main processor registers. */
69*4882a593Smuzhiyun 	unsigned long reg16;
70*4882a593Smuzhiyun 	unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
71*4882a593Smuzhiyun 	unsigned long reg29, reg30, reg31;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	/* Saved cp0 stuff. */
74*4882a593Smuzhiyun 	unsigned long cp0_status;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	/* Saved fpu/fpu emulator stuff. */
77*4882a593Smuzhiyun 	struct mips_fpu_struct fpu;
78*4882a593Smuzhiyun #ifdef CONFIG_MIPS_MT_FPAFF
79*4882a593Smuzhiyun 	/* Emulated instruction count */
80*4882a593Smuzhiyun 	unsigned long emulated_fp;
81*4882a593Smuzhiyun 	/* Saved per-thread scheduler affinity mask */
82*4882a593Smuzhiyun 	cpumask_t user_cpus_allowed;
83*4882a593Smuzhiyun #endif /* CONFIG_MIPS_MT_FPAFF */
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	/* Saved state of the DSP ASE, if available. */
86*4882a593Smuzhiyun 	struct mips_dsp_state dsp;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	/* Other stuff associated with the thread. */
89*4882a593Smuzhiyun 	unsigned long cp0_badvaddr;	/* Last user fault */
90*4882a593Smuzhiyun 	unsigned long cp0_baduaddr;	/* Last kernel fault accessing USEG */
91*4882a593Smuzhiyun 	unsigned long error_code;
92*4882a593Smuzhiyun 	unsigned long trap_no;
93*4882a593Smuzhiyun 	unsigned long irix_trampoline;  /* Wheee... */
94*4882a593Smuzhiyun 	unsigned long irix_oldctx;
95*4882a593Smuzhiyun 	struct mips_abi *abi;
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun struct task_struct;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun /* Free all resources held by a thread. */
101*4882a593Smuzhiyun #define release_thread(thread) do { } while(0)
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun /* Prepare to copy thread state - unlazy all lazy status */
104*4882a593Smuzhiyun #define prepare_to_copy(tsk)	do { } while (0)
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun #define cpu_relax()	barrier()
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun /*
109*4882a593Smuzhiyun  * Return_address is a replacement for __builtin_return_address(count)
110*4882a593Smuzhiyun  * which on certain architectures cannot reasonably be implemented in GCC
111*4882a593Smuzhiyun  * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
112*4882a593Smuzhiyun  * Note that __builtin_return_address(x>=1) is forbidden because GCC
113*4882a593Smuzhiyun  * aborts compilation on some CPUs.  It's simply not possible to unwind
114*4882a593Smuzhiyun  * some CPU's stackframes.
115*4882a593Smuzhiyun  *
116*4882a593Smuzhiyun  * __builtin_return_address works only for non-leaf functions.  We avoid the
117*4882a593Smuzhiyun  * overhead of a function call by forcing the compiler to save the return
118*4882a593Smuzhiyun  * address register on the stack.
119*4882a593Smuzhiyun  */
120*4882a593Smuzhiyun #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun #ifdef CONFIG_CPU_HAS_PREFETCH
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun #define ARCH_HAS_PREFETCH
125*4882a593Smuzhiyun 
prefetch(const void * addr)126*4882a593Smuzhiyun static inline void prefetch(const void *addr)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	__asm__ __volatile__(
129*4882a593Smuzhiyun 	"	.set	mips4		\n"
130*4882a593Smuzhiyun 	"	pref	%0, (%1)	\n"
131*4882a593Smuzhiyun 	"	.set	mips0		\n"
132*4882a593Smuzhiyun 	:
133*4882a593Smuzhiyun 	: "i" (Pref_Load), "r" (addr));
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun #endif
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun #endif /* _ASM_PROCESSOR_H */
139