1 /*
2 * Copyright (C) 1996, 99, 2003 by Ralf Baechle
3 *
4 * SPDX-License-Identifier: GPL-2.0
5 */
6 #ifndef _ASM_BYTEORDER_H
7 #define _ASM_BYTEORDER_H
8
9 #include <asm/types.h>
10
11 #ifdef __GNUC__
12
13 #ifdef CONFIG_CPU_MIPSR2
14
___arch__swab16(__u16 x)15 static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
16 {
17 __asm__(
18 " wsbh %0, %1 \n"
19 : "=r" (x)
20 : "r" (x));
21
22 return x;
23 }
24 #define __arch__swab16(x) ___arch__swab16(x)
25
___arch__swab32(__u32 x)26 static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
27 {
28 __asm__(
29 " wsbh %0, %1 \n"
30 " rotr %0, %0, 16 \n"
31 : "=r" (x)
32 : "r" (x));
33
34 return x;
35 }
36 #define __arch__swab32(x) ___arch__swab32(x)
37
38 #ifdef CONFIG_CPU_MIPS64_R2
39
___arch__swab64(__u64 x)40 static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
41 {
42 __asm__(
43 " dsbh %0, %1 \n"
44 " dshd %0, %0 \n"
45 " drotr %0, %0, 32 \n"
46 : "=r" (x)
47 : "r" (x));
48
49 return x;
50 }
51
52 #define __arch__swab64(x) ___arch__swab64(x)
53
54 #endif /* CONFIG_CPU_MIPS64_R2 */
55
56 #endif /* CONFIG_CPU_MIPSR2 */
57
58 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
59 # define __BYTEORDER_HAS_U64__
60 # define __SWAB_64_THRU_32__
61 #endif
62
63 #endif /* __GNUC__ */
64
65 #if defined(__MIPSEB__)
66 # include <linux/byteorder/big_endian.h>
67 #elif defined(__MIPSEL__)
68 # include <linux/byteorder/little_endian.h>
69 #else
70 # error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
71 #endif
72
73 #endif /* _ASM_BYTEORDER_H */
74