1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 1996, 99 Ralf Baechle 3*4882a593Smuzhiyun * Copyright (C) 2000, 2002 Maciej W. Rozycki 4*4882a593Smuzhiyun * Copyright (C) 1990, 1999 by Silicon Graphics, Inc. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #ifndef _ASM_ADDRSPACE_H 9*4882a593Smuzhiyun #define _ASM_ADDRSPACE_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <spaces.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* 14*4882a593Smuzhiyun * Configure language 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun #ifdef __ASSEMBLY__ 17*4882a593Smuzhiyun #define _ATYPE_ 18*4882a593Smuzhiyun #define _ATYPE32_ 19*4882a593Smuzhiyun #define _ATYPE64_ 20*4882a593Smuzhiyun #define _CONST64_(x) x 21*4882a593Smuzhiyun #else 22*4882a593Smuzhiyun #define _ATYPE_ __PTRDIFF_TYPE__ 23*4882a593Smuzhiyun #define _ATYPE32_ int 24*4882a593Smuzhiyun #define _ATYPE64_ __s64 25*4882a593Smuzhiyun #ifdef CONFIG_64BIT 26*4882a593Smuzhiyun #define _CONST64_(x) x ## L 27*4882a593Smuzhiyun #else 28*4882a593Smuzhiyun #define _CONST64_(x) x ## LL 29*4882a593Smuzhiyun #endif 30*4882a593Smuzhiyun #endif 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* 33*4882a593Smuzhiyun * 32-bit MIPS address spaces 34*4882a593Smuzhiyun */ 35*4882a593Smuzhiyun #ifdef __ASSEMBLY__ 36*4882a593Smuzhiyun #define _ACAST32_ 37*4882a593Smuzhiyun #define _ACAST64_ 38*4882a593Smuzhiyun #else 39*4882a593Smuzhiyun #define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */ 40*4882a593Smuzhiyun #define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */ 41*4882a593Smuzhiyun #endif 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun /* 44*4882a593Smuzhiyun * Returns the kernel segment base of a given address 45*4882a593Smuzhiyun */ 46*4882a593Smuzhiyun #define KSEGX(a) ((_ACAST32_ (a)) & 0xe0000000) 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* 49*4882a593Smuzhiyun * Returns the physical address of a CKSEGx / XKPHYS address 50*4882a593Smuzhiyun */ 51*4882a593Smuzhiyun #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) 52*4882a593Smuzhiyun #define XPHYSADDR(a) ((_ACAST64_(a)) & \ 53*4882a593Smuzhiyun _CONST64_(0x0000ffffffffffff)) 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #ifdef CONFIG_64BIT 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* 58*4882a593Smuzhiyun * Memory segments (64bit kernel mode addresses) 59*4882a593Smuzhiyun * The compatibility segments use the full 64-bit sign extended value. Note 60*4882a593Smuzhiyun * the R8000 doesn't have them so don't reference these in generic MIPS code. 61*4882a593Smuzhiyun */ 62*4882a593Smuzhiyun #define XKUSEG _CONST64_(0x0000000000000000) 63*4882a593Smuzhiyun #define XKSSEG _CONST64_(0x4000000000000000) 64*4882a593Smuzhiyun #define XKPHYS _CONST64_(0x8000000000000000) 65*4882a593Smuzhiyun #define XKSEG _CONST64_(0xc000000000000000) 66*4882a593Smuzhiyun #define CKSEG0 _CONST64_(0xffffffff80000000) 67*4882a593Smuzhiyun #define CKSEG1 _CONST64_(0xffffffffa0000000) 68*4882a593Smuzhiyun #define CKSSEG _CONST64_(0xffffffffc0000000) 69*4882a593Smuzhiyun #define CKSEG3 _CONST64_(0xffffffffe0000000) 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) 72*4882a593Smuzhiyun #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) 73*4882a593Smuzhiyun #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2) 74*4882a593Smuzhiyun #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3) 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun #else 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) 79*4882a593Smuzhiyun #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) 80*4882a593Smuzhiyun #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) 81*4882a593Smuzhiyun #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun /* 84*4882a593Smuzhiyun * Map an address to a certain kernel segment 85*4882a593Smuzhiyun */ 86*4882a593Smuzhiyun #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) 87*4882a593Smuzhiyun #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) 88*4882a593Smuzhiyun #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) 89*4882a593Smuzhiyun #define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* 92*4882a593Smuzhiyun * Memory segments (32bit kernel mode addresses) 93*4882a593Smuzhiyun * These are the traditional names used in the 32-bit universe. 94*4882a593Smuzhiyun */ 95*4882a593Smuzhiyun #define KUSEG 0x00000000 96*4882a593Smuzhiyun #define KSEG0 0x80000000 97*4882a593Smuzhiyun #define KSEG1 0xa0000000 98*4882a593Smuzhiyun #define KSEG2 0xc0000000 99*4882a593Smuzhiyun #define KSEG3 0xe0000000 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #define CKUSEG 0x00000000 102*4882a593Smuzhiyun #define CKSEG0 0x80000000 103*4882a593Smuzhiyun #define CKSEG1 0xa0000000 104*4882a593Smuzhiyun #define CKSEG2 0xc0000000 105*4882a593Smuzhiyun #define CKSEG3 0xe0000000 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun #endif 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun /* 110*4882a593Smuzhiyun * Cache modes for XKPHYS address conversion macros 111*4882a593Smuzhiyun */ 112*4882a593Smuzhiyun #define K_CALG_COH_EXCL1_NOL2 0 113*4882a593Smuzhiyun #define K_CALG_COH_SHRL1_NOL2 1 114*4882a593Smuzhiyun #define K_CALG_UNCACHED 2 115*4882a593Smuzhiyun #define K_CALG_NONCOHERENT 3 116*4882a593Smuzhiyun #define K_CALG_COH_EXCL 4 117*4882a593Smuzhiyun #define K_CALG_COH_SHAREABLE 5 118*4882a593Smuzhiyun #define K_CALG_NOTUSED 6 119*4882a593Smuzhiyun #define K_CALG_UNCACHED_ACCEL 7 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun /* 122*4882a593Smuzhiyun * 64-bit address conversions 123*4882a593Smuzhiyun */ 124*4882a593Smuzhiyun #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p)) 125*4882a593Smuzhiyun #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p)) 126*4882a593Smuzhiyun #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) 127*4882a593Smuzhiyun #define PHYS_TO_XKPHYS(cm, a) (_CONST64_(0x8000000000000000) | \ 128*4882a593Smuzhiyun (_CONST64_(cm) << 59) | (a)) 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun /* 131*4882a593Smuzhiyun * Returns the uncached address of a sdram address 132*4882a593Smuzhiyun */ 133*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 134*4882a593Smuzhiyun #if defined(CONFIG_SOC_AU1X00) || defined(CONFIG_TB0229) 135*4882a593Smuzhiyun /* We use a 36 bit physical address map here and 136*4882a593Smuzhiyun cannot access physical memory directly from core */ 137*4882a593Smuzhiyun #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000) 138*4882a593Smuzhiyun #else /* !CONFIG_SOC_AU1X00 */ 139*4882a593Smuzhiyun #define UNCACHED_SDRAM(a) CKSEG1ADDR(a) 140*4882a593Smuzhiyun #endif /* CONFIG_SOC_AU1X00 */ 141*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */ 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun /* 144*4882a593Smuzhiyun * The ultimate limited of the 64-bit MIPS architecture: 2 bits for selecting 145*4882a593Smuzhiyun * the region, 3 bits for the CCA mode. This leaves 59 bits of which the 146*4882a593Smuzhiyun * R8000 implements most with its 48-bit physical address space. 147*4882a593Smuzhiyun */ 148*4882a593Smuzhiyun #define TO_PHYS_MASK _CONST64_(0x07ffffffffffffff) /* 2^^59 - 1 */ 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun #ifndef CONFIG_CPU_R8000 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun /* 153*4882a593Smuzhiyun * The R8000 doesn't have the 32-bit compat spaces so we don't define them 154*4882a593Smuzhiyun * in order to catch bugs in the source code. 155*4882a593Smuzhiyun */ 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun #define COMPAT_K1BASE32 _CONST64_(0xffffffffa0000000) 158*4882a593Smuzhiyun #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */ 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun #endif 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun #define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK) 163*4882a593Smuzhiyun #define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE) 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun #endif /* _ASM_ADDRSPACE_H */ 166