1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2016 Marek Vasut <marex@denx.de> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include "ar934x.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "TP-Link WDR4300 Board"; 12*4882a593Smuzhiyun compatible = "tplink,wdr4300", "qca,ar934x"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun aliases { 15*4882a593Smuzhiyun serial0 = &uart0; 16*4882a593Smuzhiyun spi0 = &spi0; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun chosen { 20*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun}; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun&ehci0 { 25*4882a593Smuzhiyun status = "okay"; 26*4882a593Smuzhiyun}; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun&gmac0 { 29*4882a593Smuzhiyun phy-mode = "rgmii"; 30*4882a593Smuzhiyun status = "okay"; 31*4882a593Smuzhiyun}; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun&spi0 { 34*4882a593Smuzhiyun spi-max-frequency = <25000000>; 35*4882a593Smuzhiyun status = "okay"; 36*4882a593Smuzhiyun spi-flash@0 { 37*4882a593Smuzhiyun #address-cells = <1>; 38*4882a593Smuzhiyun #size-cells = <1>; 39*4882a593Smuzhiyun compatible = "spi-flash"; 40*4882a593Smuzhiyun memory-map = <0x1e000000 0x00800000>; 41*4882a593Smuzhiyun spi-max-frequency = <25000000>; 42*4882a593Smuzhiyun reg = <0>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun&uart0 { 47*4882a593Smuzhiyun clock-frequency = <40000000>; 48*4882a593Smuzhiyun status = "okay"; 49*4882a593Smuzhiyun}; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun&xtal { 52*4882a593Smuzhiyun clock-frequency = <40000000>; 53*4882a593Smuzhiyun}; 54