1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2015 Purna Chandra Mandal, purna.mandal@microchip.com 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun#include "pic32mzda.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "Microchip PIC32MZDASK"; 13*4882a593Smuzhiyun compatible = "microchip,pic32mzdask", "microchip,pic32mzda"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun aliases { 16*4882a593Smuzhiyun console = &uart2; 17*4882a593Smuzhiyun serial0 = &uart2; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun chosen { 21*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun}; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun&clock { 26*4882a593Smuzhiyun microchip,refo2-frequency = <50000000>; 27*4882a593Smuzhiyun microchip,refo4-frequency = <25000000>; 28*4882a593Smuzhiyun microchip,refo5-frequency = <40000000>; 29*4882a593Smuzhiyun status = "okay"; 30*4882a593Smuzhiyun u-boot,dm-pre-reloc; 31*4882a593Smuzhiyun}; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun&pinctrl { 34*4882a593Smuzhiyun status = "okay"; 35*4882a593Smuzhiyun u-boot,dm-pre-reloc; 36*4882a593Smuzhiyun}; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun&uart2 { 39*4882a593Smuzhiyun status = "okay"; 40*4882a593Smuzhiyun u-boot,dm-pre-reloc; 41*4882a593Smuzhiyun}; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun&sdhci { 44*4882a593Smuzhiyun status = "okay"; 45*4882a593Smuzhiyun}; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyunðernet { 48*4882a593Smuzhiyun reset-gpios = <&gpioJ 15 0>; 49*4882a593Smuzhiyun status = "okay"; 50*4882a593Smuzhiyun phy-mode = "rmii"; 51*4882a593Smuzhiyun phy-handle = <ðernet_phy>; 52*4882a593Smuzhiyun ethernet_phy: lan8740_phy@0 { 53*4882a593Smuzhiyun reg = <0>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun}; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun&usb { 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun};