1*4882a593Smuzhiyun/dts-v1/; 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun/memreserve/ 0x00000000 0x00001000; /* Exception vectors */ 4*4882a593Smuzhiyun/memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/ { 7*4882a593Smuzhiyun #address-cells = <1>; 8*4882a593Smuzhiyun #size-cells = <1>; 9*4882a593Smuzhiyun compatible = "mti,malta"; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun chosen { 12*4882a593Smuzhiyun stdout-path = &uart0; 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun isa@0 { 16*4882a593Smuzhiyun compatible = "isa"; 17*4882a593Smuzhiyun #address-cells = <2>; 18*4882a593Smuzhiyun #size-cells = <1>; 19*4882a593Smuzhiyun ranges = <1 0 0 0x1000>; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun uart0: serial@3f8 { 22*4882a593Smuzhiyun compatible = "ns16550a"; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun reg = <1 0x3f8 0x40>; 25*4882a593Smuzhiyun reg-shift = <0>; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun clock-frequency = <1843200>; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun u-boot,dm-pre-reloc; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun}; 33