1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2017 Google, Inc 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _ABI_MACH_ASPEED_AST2500_RESET_H_ 8*4882a593Smuzhiyun #define _ABI_MACH_ASPEED_AST2500_RESET_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* 11*4882a593Smuzhiyun * The values are intentionally layed out as flags in 12*4882a593Smuzhiyun * WDT reset parameter. 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define AST_RESET_SOC 0 16*4882a593Smuzhiyun #define AST_RESET_CHIP 1 17*4882a593Smuzhiyun #define AST_RESET_CPU (1 << 1) 18*4882a593Smuzhiyun #define AST_RESET_ARM (1 << 2) 19*4882a593Smuzhiyun #define AST_RESET_COPROC (1 << 3) 20*4882a593Smuzhiyun #define AST_RESET_SDRAM (1 << 4) 21*4882a593Smuzhiyun #define AST_RESET_AHB (1 << 5) 22*4882a593Smuzhiyun #define AST_RESET_I2C (1 << 6) 23*4882a593Smuzhiyun #define AST_RESET_MAC1 (1 << 7) 24*4882a593Smuzhiyun #define AST_RESET_MAC2 (1 << 8) 25*4882a593Smuzhiyun #define AST_RESET_GCRT (1 << 9) 26*4882a593Smuzhiyun #define AST_RESET_USB20 (1 << 10) 27*4882a593Smuzhiyun #define AST_RESET_USB11_HOST (1 << 11) 28*4882a593Smuzhiyun #define AST_RESET_USB11_HID (1 << 12) 29*4882a593Smuzhiyun #define AST_RESET_VIDEO (1 << 13) 30*4882a593Smuzhiyun #define AST_RESET_HAC (1 << 14) 31*4882a593Smuzhiyun #define AST_RESET_LPC (1 << 15) 32*4882a593Smuzhiyun #define AST_RESET_SDIO (1 << 16) 33*4882a593Smuzhiyun #define AST_RESET_MIC (1 << 17) 34*4882a593Smuzhiyun #define AST_RESET_CRT2D (1 << 18) 35*4882a593Smuzhiyun #define AST_RESET_PWM (1 << 19) 36*4882a593Smuzhiyun #define AST_RESET_PECI (1 << 20) 37*4882a593Smuzhiyun #define AST_RESET_JTAG (1 << 21) 38*4882a593Smuzhiyun #define AST_RESET_ADC (1 << 22) 39*4882a593Smuzhiyun #define AST_RESET_GPIO (1 << 23) 40*4882a593Smuzhiyun #define AST_RESET_MCTP (1 << 24) 41*4882a593Smuzhiyun #define AST_RESET_XDMA (1 << 25) 42*4882a593Smuzhiyun #define AST_RESET_SPI (1 << 26) 43*4882a593Smuzhiyun #define AST_RESET_MISC (1 << 27) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #endif /* _ABI_MACH_ASPEED_AST2500_RESET_H_ */ 46