1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _DT_BINDINGS_INTEL_IRQ_H_ 8*4882a593Smuzhiyun #define _DT_BINDINGS_INTEL_IRQ_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* PCI interrupt pin */ 11*4882a593Smuzhiyun #define INTA 1 12*4882a593Smuzhiyun #define INTB 2 13*4882a593Smuzhiyun #define INTC 3 14*4882a593Smuzhiyun #define INTD 4 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* PIRQs */ 17*4882a593Smuzhiyun #define PIRQA 0 18*4882a593Smuzhiyun #define PIRQB 1 19*4882a593Smuzhiyun #define PIRQC 2 20*4882a593Smuzhiyun #define PIRQD 3 21*4882a593Smuzhiyun #define PIRQE 4 22*4882a593Smuzhiyun #define PIRQF 5 23*4882a593Smuzhiyun #define PIRQG 6 24*4882a593Smuzhiyun #define PIRQH 7 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* PCI bdf encoding */ 27*4882a593Smuzhiyun #ifndef PCI_BDF 28*4882a593Smuzhiyun #define PCI_BDF(b, d, f) ((b) << 16 | (d) << 11 | (f) << 8) 29*4882a593Smuzhiyun #endif 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #endif /* _DT_BINDINGS_INTEL_IRQ_H_ */ 32