1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This header provides constants clk index STMicroelectronics 3*4882a593Smuzhiyun * STiH410 SoC. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLK_STIH410 6*4882a593Smuzhiyun #define _DT_BINDINGS_CLK_STIH410 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include "stih407-clks.h" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* STiH410 introduces new clock outputs compared to STiH407 */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* CLOCKGEN C0 */ 13*4882a593Smuzhiyun #define CLK_TX_ICN_HADES 32 14*4882a593Smuzhiyun #define CLK_RX_ICN_HADES 33 15*4882a593Smuzhiyun #define CLK_ICN_REG_16 34 16*4882a593Smuzhiyun #define CLK_PP_HADES 35 17*4882a593Smuzhiyun #define CLK_CLUST_HADES 36 18*4882a593Smuzhiyun #define CLK_HWPE_HADES 37 19*4882a593Smuzhiyun #define CLK_FC_HADES 38 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* CLOCKGEN D0 */ 22*4882a593Smuzhiyun #define CLK_PCMR10_MASTER 4 23*4882a593Smuzhiyun #define CLK_USB2_PHY 5 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #endif 26