1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This header provides constants for AT91 pmc status. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * The constants defined in this header are being used in dts. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Licensed under GPLv2 or later. 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLK_AT91_H 10*4882a593Smuzhiyun #define _DT_BINDINGS_CLK_AT91_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define AT91_PMC_MOSCS 0 /* MOSCS Flag */ 13*4882a593Smuzhiyun #define AT91_PMC_LOCKA 1 /* PLLA Lock */ 14*4882a593Smuzhiyun #define AT91_PMC_LOCKB 2 /* PLLB Lock */ 15*4882a593Smuzhiyun #define AT91_PMC_MCKRDY 3 /* Master Clock */ 16*4882a593Smuzhiyun #define AT91_PMC_LOCKU 6 /* UPLL Lock */ 17*4882a593Smuzhiyun #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */ 18*4882a593Smuzhiyun #define AT91_PMC_MOSCSELS 16 /* Main Oscillator Selection */ 19*4882a593Smuzhiyun #define AT91_PMC_MOSCRCS 17 /* Main On-Chip RC */ 20*4882a593Smuzhiyun #define AT91_PMC_CFDEV 18 /* Clock Failure Detector Event */ 21*4882a593Smuzhiyun #define AT91_PMC_GCKRDY 24 /* Generated Clocks */ 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #endif 24