1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * MCF5253 Internal Memory Map 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 5*4882a593Smuzhiyun * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __IMMAP_5253__ 11*4882a593Smuzhiyun #define __IMMAP_5253__ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define MMAP_INTC (CONFIG_SYS_MBAR + 0x00000040) 14*4882a593Smuzhiyun #define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00000080) 15*4882a593Smuzhiyun #define MMAP_DTMR0 (CONFIG_SYS_MBAR + 0x00000140) 16*4882a593Smuzhiyun #define MMAP_DTMR1 (CONFIG_SYS_MBAR + 0x00000180) 17*4882a593Smuzhiyun #define MMAP_UART0 (CONFIG_SYS_MBAR + 0x000001C0) 18*4882a593Smuzhiyun #define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000200) 19*4882a593Smuzhiyun #define MMAP_I2C0 (CONFIG_SYS_MBAR + 0x00000280) 20*4882a593Smuzhiyun #define MMAP_QSPI (CONFIG_SYS_MBAR + 0x00000400) 21*4882a593Smuzhiyun #define MMAP_CAN0 (CONFIG_SYS_MBAR + 0x00010000) 22*4882a593Smuzhiyun #define MMAP_CAN1 (CONFIG_SYS_MBAR + 0x00011000) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define MMAP_PAR (CONFIG_SYS_MBAR2 + 0x0000019C) 25*4882a593Smuzhiyun #define MMAP_I2C1 (CONFIG_SYS_MBAR2 + 0x00000440) 26*4882a593Smuzhiyun #define MMAP_UART2 (CONFIG_SYS_MBAR2 + 0x00000C00) 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #include <asm/coldfire/ata.h> 29*4882a593Smuzhiyun #include <asm/coldfire/flexbus.h> 30*4882a593Smuzhiyun #include <asm/coldfire/flexcan.h> 31*4882a593Smuzhiyun #include <asm/coldfire/qspi.h> 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun typedef struct canex_ctrl { 34*4882a593Smuzhiyun can_msg_t msg[32]; /* 0x80 Message Buffer 0-31 */ 35*4882a593Smuzhiyun } canex_t; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #endif /* __IMMAP_5253__ */ 38