1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * (C) Copyright 2000-2003
4*4882a593Smuzhiyun * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
7*4882a593Smuzhiyun * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <common.h>
13*4882a593Smuzhiyun #include <watchdog.h>
14*4882a593Smuzhiyun #include <command.h>
15*4882a593Smuzhiyun #include <netdev.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <asm/immap.h>
18*4882a593Smuzhiyun #include <asm/io.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
21*4882a593Smuzhiyun
do_reset(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])22*4882a593Smuzhiyun int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun ccm_t *ccm = (ccm_t *) MMAP_CCM;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun out_8(&ccm->rcr, CCM_RCR_SOFTRST);
27*4882a593Smuzhiyun /* we don't return! */
28*4882a593Smuzhiyun return 0;
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
checkcpu(void)31*4882a593Smuzhiyun int checkcpu(void)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun ccm_t *ccm = (ccm_t *) MMAP_CCM;
34*4882a593Smuzhiyun u16 msk;
35*4882a593Smuzhiyun u16 id = 0;
36*4882a593Smuzhiyun u8 ver;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun puts("CPU: ");
39*4882a593Smuzhiyun msk = (in_be16(&ccm->cir) >> 6);
40*4882a593Smuzhiyun ver = (in_be16(&ccm->cir) & 0x003f);
41*4882a593Smuzhiyun switch (msk) {
42*4882a593Smuzhiyun case 0x31:
43*4882a593Smuzhiyun id = 5235;
44*4882a593Smuzhiyun break;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun if (id) {
48*4882a593Smuzhiyun char buf1[32], buf2[32];
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
51*4882a593Smuzhiyun ver);
52*4882a593Smuzhiyun printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
53*4882a593Smuzhiyun strmhz(buf1, gd->cpu_clk),
54*4882a593Smuzhiyun strmhz(buf2, gd->bus_clk));
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun return 0;
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #if defined(CONFIG_WATCHDOG)
61*4882a593Smuzhiyun /* Called by macro WATCHDOG_RESET */
watchdog_reset(void)62*4882a593Smuzhiyun void watchdog_reset(void)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /* Count register */
67*4882a593Smuzhiyun out_be16(&wdp->sr, 0x5555);
68*4882a593Smuzhiyun asm("nop");
69*4882a593Smuzhiyun out_be16(&wdp->sr, 0xaaaa);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
watchdog_disable(void)72*4882a593Smuzhiyun int watchdog_disable(void)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
77*4882a593Smuzhiyun /* halted watchdog timer */
78*4882a593Smuzhiyun setbits_be16(&wdp->cr, WTM_WCR_HALTED);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun puts("WATCHDOG:disabled\n");
81*4882a593Smuzhiyun return (0);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
watchdog_init(void)84*4882a593Smuzhiyun int watchdog_init(void)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
87*4882a593Smuzhiyun u32 wdog_module = 0;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun /* set timeout and enable watchdog */
90*4882a593Smuzhiyun wdog_module = ((CONFIG_SYS_CLK / CONFIG_SYS_HZ) * CONFIG_WATCHDOG_TIMEOUT);
91*4882a593Smuzhiyun wdog_module |= (wdog_module / 8192);
92*4882a593Smuzhiyun out_be16(&wdp->mr, wdog_module);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun out_be16(&wdp->cr, WTM_WCR_EN);
95*4882a593Smuzhiyun puts("WATCHDOG:enabled\n");
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun return (0);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun #endif /* CONFIG_WATCHDOG */
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun #if defined(CONFIG_MCFFEC)
102*4882a593Smuzhiyun /* Default initializations for MCFFEC controllers. To override,
103*4882a593Smuzhiyun * create a board-specific function called:
104*4882a593Smuzhiyun * int board_eth_init(bd_t *bis)
105*4882a593Smuzhiyun */
106*4882a593Smuzhiyun
cpu_eth_init(bd_t * bis)107*4882a593Smuzhiyun int cpu_eth_init(bd_t *bis)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun return mcffec_initialize(bis);
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun #endif
112