1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2013 Xilinx Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _SYS_PROTO_H_ 8*4882a593Smuzhiyun #define _SYS_PROTO_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun extern void zynq_slcr_lock(void); 11*4882a593Smuzhiyun extern void zynq_slcr_unlock(void); 12*4882a593Smuzhiyun extern void zynq_slcr_cpu_reset(void); 13*4882a593Smuzhiyun extern void zynq_slcr_devcfg_disable(void); 14*4882a593Smuzhiyun extern void zynq_slcr_devcfg_enable(void); 15*4882a593Smuzhiyun extern u32 zynq_slcr_get_boot_mode(void); 16*4882a593Smuzhiyun extern u32 zynq_slcr_get_idcode(void); 17*4882a593Smuzhiyun extern int zynq_slcr_get_mio_pin_status(const char *periph); 18*4882a593Smuzhiyun extern void zynq_ddrc_init(void); 19*4882a593Smuzhiyun extern unsigned int zynq_get_silicon_version(void); 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun int zynq_board_read_rom_ethaddr(unsigned char *ethaddr); 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* Driver extern functions */ 24*4882a593Smuzhiyun extern void ps7_init(void); 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #endif /* _SYS_PROTO_H_ */ 27