1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2012 - 2013 Michal Simek <monstr@monstr.eu> 3*4882a593Smuzhiyun * Copyright (C) 2012 - 2013 Xilinx, Inc. All rights reserved. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <common.h> 9*4882a593Smuzhiyun #include <asm/io.h> 10*4882a593Smuzhiyun #include <asm/arch/sys_proto.h> 11*4882a593Smuzhiyun #include <asm/arch/hardware.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #ifndef CONFIG_ZYNQ_DDRC_INIT zynq_ddrc_init(void)16*4882a593Smuzhiyunvoid zynq_ddrc_init(void) {} 17*4882a593Smuzhiyun #else 18*4882a593Smuzhiyun /* Control regsiter bitfield definitions */ 19*4882a593Smuzhiyun #define ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK 0xC 20*4882a593Smuzhiyun #define ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT 2 21*4882a593Smuzhiyun #define ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT 1 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* ECC scrub regsiter definitions */ 24*4882a593Smuzhiyun #define ZYNQ_DDRC_ECC_SCRUBREG_ECC_MODE_MASK 0x7 25*4882a593Smuzhiyun #define ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED 0x4 26*4882a593Smuzhiyun zynq_ddrc_init(void)27*4882a593Smuzhiyunvoid zynq_ddrc_init(void) 28*4882a593Smuzhiyun { 29*4882a593Smuzhiyun u32 width, ecctype; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun width = readl(&ddrc_base->ddrc_ctrl); 32*4882a593Smuzhiyun width = (width & ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK) >> 33*4882a593Smuzhiyun ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT; 34*4882a593Smuzhiyun ecctype = (readl(&ddrc_base->ecc_scrub) & 35*4882a593Smuzhiyun ZYNQ_DDRC_ECC_SCRUBREG_ECC_MODE_MASK); 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* ECC is enabled when memory is in 16bit mode and it is enabled */ 38*4882a593Smuzhiyun if ((ecctype == ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED) && 39*4882a593Smuzhiyun (width == ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT)) { 40*4882a593Smuzhiyun puts("ECC enabled "); 41*4882a593Smuzhiyun /* 42*4882a593Smuzhiyun * Clear the first 1MB because it is not initialized from 43*4882a593Smuzhiyun * first stage bootloader. To get ECC to work all memory has 44*4882a593Smuzhiyun * been initialized by writing any value. 45*4882a593Smuzhiyun */ 46*4882a593Smuzhiyun /* cppcheck-suppress nullPointer */ 47*4882a593Smuzhiyun memset((void *)0, 0, 1 * 1024 * 1024); 48*4882a593Smuzhiyun } else { 49*4882a593Smuzhiyun puts("ECC disabled "); 50*4882a593Smuzhiyun } 51*4882a593Smuzhiyun } 52*4882a593Smuzhiyun #endif 53