1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016-2017 Socionext Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <common.h> 8*4882a593Smuzhiyun #include <spl.h> 9*4882a593Smuzhiyun #include <linux/io.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include "../init.h" 12*4882a593Smuzhiyun #include "sbc-regs.h" 13*4882a593Smuzhiyun uniphier_ld11_sbc_init(void)14*4882a593Smuzhiyunvoid uniphier_ld11_sbc_init(void) 15*4882a593Smuzhiyun { 16*4882a593Smuzhiyun uniphier_sbc_init_savepin(); 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* necessary for ROM boot ?? */ 19*4882a593Smuzhiyun /* system bus output enable */ 20*4882a593Smuzhiyun writel(0x17, PC0CTRL); 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* pins for NAND and System Bus are multiplexed */ 23*4882a593Smuzhiyun if (spl_boot_device() != BOOT_DEVICE_NAND) 24*4882a593Smuzhiyun uniphier_pin_init("system_bus_grp"); 25*4882a593Smuzhiyun } 26