xref: /OK3568_Linux_fs/u-boot/arch/arm/mach-uniphier/reset.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2012-2014 Panasonic Corporation
3*4882a593Smuzhiyun  * Copyright (C) 2015-2016 Socionext Inc.
4*4882a593Smuzhiyun  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <asm/secure.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include "sc-regs.h"
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun /* If PSCI is enabled, this is used for SYSTEM_RESET function */
16*4882a593Smuzhiyun #ifdef CONFIG_ARMV7_PSCI
17*4882a593Smuzhiyun #define __SECURE	__secure
18*4882a593Smuzhiyun #else
19*4882a593Smuzhiyun #define __SECURE
20*4882a593Smuzhiyun #endif
21*4882a593Smuzhiyun 
reset_cpu(unsigned long ignored)22*4882a593Smuzhiyun void __SECURE reset_cpu(unsigned long ignored)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun 	u32 tmp;
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun 	writel(5, SC_IRQTIMSET); /* default value */
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	tmp  = readl(SC_SLFRSTSEL);
29*4882a593Smuzhiyun 	tmp &= ~0x3; /* mask [1:0] */
30*4882a593Smuzhiyun 	tmp |= 0x0;  /* XRST reboot */
31*4882a593Smuzhiyun 	writel(tmp, SC_SLFRSTSEL);
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun 	tmp = readl(SC_SLFRSTCTL);
34*4882a593Smuzhiyun 	tmp |= 0x1;
35*4882a593Smuzhiyun 	writel(tmp, SC_SLFRSTCTL);
36*4882a593Smuzhiyun }
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