1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <config.h>
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include "../sc64-regs.h"
12*4882a593Smuzhiyun #include "../sg-regs.h"
13*4882a593Smuzhiyun #include "debug-uart.h"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define UNIPHIER_LD20_UART_CLK 58820000
16*4882a593Smuzhiyun
uniphier_ld20_debug_uart_init(void)17*4882a593Smuzhiyun unsigned int uniphier_ld20_debug_uart_init(void)
18*4882a593Smuzhiyun {
19*4882a593Smuzhiyun u32 tmp;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun sg_set_iectrl(54); /* TXD0 */
22*4882a593Smuzhiyun sg_set_iectrl(58); /* TXD1 */
23*4882a593Smuzhiyun sg_set_iectrl(90); /* TXD2 */
24*4882a593Smuzhiyun sg_set_iectrl(94); /* TXD3 */
25*4882a593Smuzhiyun sg_set_pinsel(54, 0, 8, 4); /* TXD0 -> TXD0 */
26*4882a593Smuzhiyun sg_set_pinsel(58, 1, 8, 4); /* SPITXD1 -> TXD1 */
27*4882a593Smuzhiyun sg_set_pinsel(90, 1, 8, 4); /* PC0WE -> TXD2 */
28*4882a593Smuzhiyun sg_set_pinsel(94, 1, 8, 4); /* PCD00 -> TXD3 */
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun tmp = readl(SC_CLKCTRL4);
31*4882a593Smuzhiyun tmp |= SC_CLKCTRL4_PERI;
32*4882a593Smuzhiyun writel(tmp, SC_CLKCTRL4);
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun return DIV_ROUND_CLOSEST(UNIPHIER_LD20_UART_CLK, 16 * CONFIG_BAUDRATE);
35*4882a593Smuzhiyun }
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