1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016-2017 Socionext Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <common.h> 8*4882a593Smuzhiyun #include <spl.h> 9*4882a593Smuzhiyun #include <linux/io.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include "../init.h" 12*4882a593Smuzhiyun #include "../sc-regs.h" 13*4882a593Smuzhiyun uniphier_pxs2_dram_clk_init(void)14*4882a593Smuzhiyunvoid uniphier_pxs2_dram_clk_init(void) 15*4882a593Smuzhiyun { 16*4882a593Smuzhiyun u32 tmp; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* deassert reset */ 19*4882a593Smuzhiyun tmp = readl(SC_RSTCTRL4); 20*4882a593Smuzhiyun tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 | 21*4882a593Smuzhiyun SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 | 22*4882a593Smuzhiyun SC_RSTCTRL4_NRST_UMC32 | SC_RSTCTRL4_NRST_UMC31 | 23*4882a593Smuzhiyun SC_RSTCTRL4_NRST_UMC30; 24*4882a593Smuzhiyun writel(tmp, SC_RSTCTRL4); 25*4882a593Smuzhiyun readl(SC_RSTCTRL4); /* dummy read */ 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* provide clocks */ 28*4882a593Smuzhiyun tmp = readl(SC_CLKCTRL4); 29*4882a593Smuzhiyun tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC2 | 30*4882a593Smuzhiyun SC_CLKCTRL4_CEN_UMC1 | SC_CLKCTRL4_CEN_UMC0; 31*4882a593Smuzhiyun writel(tmp, SC_CLKCTRL4); 32*4882a593Smuzhiyun readl(SC_CLKCTRL4); /* dummy read */ 33*4882a593Smuzhiyun } 34