1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * UniPhier BCU (Bus Control Unit) registers 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2011-2014 Panasonic Corporation 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef ARCH_BCU_REGS_H 10*4882a593Smuzhiyun #define ARCH_BCU_REGS_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define BCU_BASE 0x50080000 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define BCSCR(x) (BCU_BASE + 0x180 + (x) * 4) 15*4882a593Smuzhiyun #define BCSCR0 (BCSCR(0)) 16*4882a593Smuzhiyun #define BCSCR1 (BCSCR(1)) 17*4882a593Smuzhiyun #define BCSCR2 (BCSCR(2)) 18*4882a593Smuzhiyun #define BCSCR3 (BCSCR(3)) 19*4882a593Smuzhiyun #define BCSCR4 (BCSCR(4)) 20*4882a593Smuzhiyun #define BCSCR5 (BCSCR(5)) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define BCIPPCCHR(x) (BCU_BASE + 0x0280 + (x) * 4) 23*4882a593Smuzhiyun #define BCIPPCCHR0 (BCIPPCCHR(0)) 24*4882a593Smuzhiyun #define BCIPPCCHR1 (BCIPPCCHR(1)) 25*4882a593Smuzhiyun #define BCIPPCCHR2 (BCIPPCCHR(2)) 26*4882a593Smuzhiyun #define BCIPPCCHR3 (BCIPPCCHR(3)) 27*4882a593Smuzhiyun #define BCIPPCCHR4 (BCIPPCCHR(4)) 28*4882a593Smuzhiyun #define BCIPPCCHR5 (BCIPPCCHR(5)) 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #endif /* ARCH_BCU_REGS_H */ 31