1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2011-2014 Panasonic Corporation 3*4882a593Smuzhiyun * Copyright (C) 2015-2016 Socionext Inc. 4*4882a593Smuzhiyun * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/io.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include "../init.h" 12*4882a593Smuzhiyun #include "bcu-regs.h" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x)) 15*4882a593Smuzhiyun uniphier_ld4_bcu_init(const struct uniphier_board_data * bd)16*4882a593Smuzhiyunvoid uniphier_ld4_bcu_init(const struct uniphier_board_data *bd) 17*4882a593Smuzhiyun { 18*4882a593Smuzhiyun int shift; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun writel(0x44444444, BCSCR0); /* 0x20000000-0x3fffffff: ASM bus */ 21*4882a593Smuzhiyun writel(0x11111111, BCSCR2); /* 0x80000000-0x9fffffff: IPPC/IPPD-bus */ 22*4882a593Smuzhiyun writel(0x11111111, BCSCR3); /* 0xa0000000-0xbfffffff: IPPC/IPPD-bus */ 23*4882a593Smuzhiyun writel(0x11111111, BCSCR4); /* 0xc0000000-0xdfffffff: IPPC/IPPD-bus */ 24*4882a593Smuzhiyun writel(0x11111111, BCSCR5); /* 0xe0000000-0Xffffffff: IPPC/IPPD-bus */ 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* Specify DDR channel */ 27*4882a593Smuzhiyun shift = bd->dram_ch[0].size / 0x04000000 * 4; 28*4882a593Smuzhiyun writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */ 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun shift -= 32; 31*4882a593Smuzhiyun writel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */ 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun shift -= 32; 34*4882a593Smuzhiyun writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */ 35*4882a593Smuzhiyun } 36