1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun /* Tegra114 high-level function multiplexing */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <asm/arch/clock.h>
11*4882a593Smuzhiyun #include <asm/arch/funcmux.h>
12*4882a593Smuzhiyun #include <asm/arch/pinmux.h>
13*4882a593Smuzhiyun
funcmux_select(enum periph_id id,int config)14*4882a593Smuzhiyun int funcmux_select(enum periph_id id, int config)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun int bad_config = config != FUNCMUX_DEFAULT;
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun switch (id) {
19*4882a593Smuzhiyun case PERIPH_ID_UART4:
20*4882a593Smuzhiyun switch (config) {
21*4882a593Smuzhiyun case FUNCMUX_UART4_GMI:
22*4882a593Smuzhiyun pinmux_set_func(PMUX_PINGRP_GMI_A16_PJ7,
23*4882a593Smuzhiyun PMUX_FUNC_UARTD);
24*4882a593Smuzhiyun pinmux_set_func(PMUX_PINGRP_GMI_A17_PB0,
25*4882a593Smuzhiyun PMUX_FUNC_UARTD);
26*4882a593Smuzhiyun pinmux_set_func(PMUX_PINGRP_GMI_A18_PB1,
27*4882a593Smuzhiyun PMUX_FUNC_UARTD);
28*4882a593Smuzhiyun pinmux_set_func(PMUX_PINGRP_GMI_A19_PK7,
29*4882a593Smuzhiyun PMUX_FUNC_UARTD);
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun pinmux_set_io(PMUX_PINGRP_GMI_A16_PJ7, PMUX_PIN_OUTPUT);
32*4882a593Smuzhiyun pinmux_set_io(PMUX_PINGRP_GMI_A17_PB0, PMUX_PIN_INPUT);
33*4882a593Smuzhiyun pinmux_set_io(PMUX_PINGRP_GMI_A18_PB1, PMUX_PIN_INPUT);
34*4882a593Smuzhiyun pinmux_set_io(PMUX_PINGRP_GMI_A19_PK7, PMUX_PIN_OUTPUT);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun pinmux_tristate_disable(PMUX_PINGRP_GMI_A16_PJ7);
37*4882a593Smuzhiyun pinmux_tristate_disable(PMUX_PINGRP_GMI_A17_PB0);
38*4882a593Smuzhiyun pinmux_tristate_disable(PMUX_PINGRP_GMI_A18_PB1);
39*4882a593Smuzhiyun pinmux_tristate_disable(PMUX_PINGRP_GMI_A19_PK7);
40*4882a593Smuzhiyun break;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun break;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /* Add other periph IDs here as needed */
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun default:
47*4882a593Smuzhiyun debug("%s: invalid periph_id %d", __func__, id);
48*4882a593Smuzhiyun return -1;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun if (bad_config) {
52*4882a593Smuzhiyun debug("%s: invalid config %d for periph_id %d", __func__,
53*4882a593Smuzhiyun config, id);
54*4882a593Smuzhiyun return -1;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun return 0;
57*4882a593Smuzhiyun }
58