1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2012 3*4882a593Smuzhiyun * NVIDIA Inc, <www.nvidia.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Allen Martin <amartin@nvidia.com> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun #include <common.h> 10*4882a593Smuzhiyun #include <debug_uart.h> 11*4882a593Smuzhiyun #include <spl.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <asm/io.h> 14*4882a593Smuzhiyun #include <asm/arch/clock.h> 15*4882a593Smuzhiyun #include <asm/arch/pinmux.h> 16*4882a593Smuzhiyun #include <asm/arch/tegra.h> 17*4882a593Smuzhiyun #include <asm/arch-tegra/apb_misc.h> 18*4882a593Smuzhiyun #include <asm/arch-tegra/board.h> 19*4882a593Smuzhiyun #include <asm/spl.h> 20*4882a593Smuzhiyun #include "cpu.h" 21*4882a593Smuzhiyun spl_board_init(void)22*4882a593Smuzhiyunvoid spl_board_init(void) 23*4882a593Smuzhiyun { 24*4882a593Smuzhiyun struct apb_misc_pp_ctlr *apb_misc = 25*4882a593Smuzhiyun (struct apb_misc_pp_ctlr *)NV_PA_APB_MISC_BASE; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* enable JTAG */ 28*4882a593Smuzhiyun writel(0xC0, &apb_misc->cfg_ctl); 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun board_init_uart_f(); 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* Initialize periph GPIOs */ 33*4882a593Smuzhiyun gpio_early_init_uart(); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun clock_early_init(); 36*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_UART 37*4882a593Smuzhiyun debug_uart_init(); 38*4882a593Smuzhiyun #endif 39*4882a593Smuzhiyun preloader_console_init(); 40*4882a593Smuzhiyun } 41*4882a593Smuzhiyun spl_boot_device(void)42*4882a593Smuzhiyunu32 spl_boot_device(void) 43*4882a593Smuzhiyun { 44*4882a593Smuzhiyun return BOOT_DEVICE_RAM; 45*4882a593Smuzhiyun } 46*4882a593Smuzhiyun jump_to_image_no_args(struct spl_image_info * spl_image)47*4882a593Smuzhiyunvoid __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 48*4882a593Smuzhiyun { 49*4882a593Smuzhiyun debug("image entry point: 0x%lX\n", spl_image->entry_point); 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun start_cpu((u32)spl_image->entry_point); 52*4882a593Smuzhiyun halt_avp(); 53*4882a593Smuzhiyun } 54