1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2016, NVIDIA CORPORATION. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <common.h> 8*4882a593Smuzhiyun #include <asm/arch/tegra.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR; 11*4882a593Smuzhiyun board_early_init_f(void)12*4882a593Smuzhiyunint board_early_init_f(void) 13*4882a593Smuzhiyun { 14*4882a593Smuzhiyun return 0; 15*4882a593Smuzhiyun } 16*4882a593Smuzhiyun tegra_board_init(void)17*4882a593Smuzhiyun__weak int tegra_board_init(void) 18*4882a593Smuzhiyun { 19*4882a593Smuzhiyun return 0; 20*4882a593Smuzhiyun } 21*4882a593Smuzhiyun board_init(void)22*4882a593Smuzhiyunint board_init(void) 23*4882a593Smuzhiyun { 24*4882a593Smuzhiyun return tegra_board_init(); 25*4882a593Smuzhiyun } 26*4882a593Smuzhiyun tegra_soc_board_init_late(void)27*4882a593Smuzhiyun__weak int tegra_soc_board_init_late(void) 28*4882a593Smuzhiyun { 29*4882a593Smuzhiyun return 0; 30*4882a593Smuzhiyun } 31*4882a593Smuzhiyun board_late_init(void)32*4882a593Smuzhiyunint board_late_init(void) 33*4882a593Smuzhiyun { 34*4882a593Smuzhiyun return tegra_soc_board_init_late(); 35*4882a593Smuzhiyun } 36