1*4882a593Smuzhiyun# 2*4882a593Smuzhiyun# (C) Copyright 2010-2015 Nvidia Corporation. 3*4882a593Smuzhiyun# 4*4882a593Smuzhiyun# (C) Copyright 2000-2008 5*4882a593Smuzhiyun# Wolfgang Denk, DENX Software Engineering, wd@denx.de. 6*4882a593Smuzhiyun# 7*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun# 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunifndef CONFIG_TEGRA186 11*4882a593Smuzhiyunifdef CONFIG_SPL_BUILD 12*4882a593Smuzhiyunobj-y += spl.o 13*4882a593Smuzhiyunobj-y += cpu.o 14*4882a593Smuzhiyunelse 15*4882a593Smuzhiyunobj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o 16*4882a593Smuzhiyunendif 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunobj-y += ap.o 19*4882a593Smuzhiyunobj-y += board.o board2.o 20*4882a593Smuzhiyunobj-y += cache.o 21*4882a593Smuzhiyunobj-y += clock.o 22*4882a593Smuzhiyunobj-y += pinmux-common.o 23*4882a593Smuzhiyunobj-y += powergate.o 24*4882a593Smuzhiyunobj-y += xusb-padctl-dummy.o 25*4882a593Smuzhiyunendif 26*4882a593Smuzhiyun 27*4882a593Smuzhiyunobj-$(CONFIG_ARM64) += arm64-mmu.o 28*4882a593Smuzhiyunobj-y += dt-setup.o 29*4882a593Smuzhiyunobj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o 30*4882a593Smuzhiyunobj-$(CONFIG_TEGRA_GPU) += gpu.o 31*4882a593Smuzhiyunobj-$(CONFIG_TEGRA_IVC) += ivc.o 32*4882a593Smuzhiyunobj-y += lowlevel_init.o 33*4882a593Smuzhiyunifndef CONFIG_SPL_BUILD 34*4882a593Smuzhiyunobj-$(CONFIG_ARMV7_PSCI) += psci.o 35*4882a593Smuzhiyunendif 36*4882a593Smuzhiyunobj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o 37*4882a593Smuzhiyun 38*4882a593Smuzhiyunobj-$(CONFIG_TEGRA20) += tegra20/ 39*4882a593Smuzhiyunobj-$(CONFIG_TEGRA30) += tegra30/ 40*4882a593Smuzhiyunobj-$(CONFIG_TEGRA114) += tegra114/ 41*4882a593Smuzhiyunobj-$(CONFIG_TEGRA124) += tegra124/ 42*4882a593Smuzhiyunobj-$(CONFIG_TEGRA186) += tegra186/ 43*4882a593Smuzhiyunobj-$(CONFIG_TEGRA210) += tegra210/ 44