xref: /OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/Kconfig (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyunif TEGRA
2*4882a593Smuzhiyun
3*4882a593Smuzhiyunconfig SPL_GPIO_SUPPORT
4*4882a593Smuzhiyun	default y
5*4882a593Smuzhiyun
6*4882a593Smuzhiyunconfig SPL_LIBCOMMON_SUPPORT
7*4882a593Smuzhiyun	default y
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunconfig SPL_LIBGENERIC_SUPPORT
10*4882a593Smuzhiyun	default y
11*4882a593Smuzhiyun
12*4882a593Smuzhiyunconfig SPL_SERIAL_SUPPORT
13*4882a593Smuzhiyun	default y
14*4882a593Smuzhiyun
15*4882a593Smuzhiyunconfig TEGRA_IVC
16*4882a593Smuzhiyun	bool "Tegra IVC protocol"
17*4882a593Smuzhiyun	help
18*4882a593Smuzhiyun	  IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
19*4882a593Smuzhiyun	  (Inter Processor Communication) framework. Within the context of
20*4882a593Smuzhiyun	  U-Boot, it is typically used for communication between the main CPU
21*4882a593Smuzhiyun	  and various auxiliary processors.
22*4882a593Smuzhiyun
23*4882a593Smuzhiyunconfig TEGRA_COMMON
24*4882a593Smuzhiyun	bool "Tegra common options"
25*4882a593Smuzhiyun	select CLK
26*4882a593Smuzhiyun	select DM
27*4882a593Smuzhiyun	select DM_ETH
28*4882a593Smuzhiyun	select DM_GPIO
29*4882a593Smuzhiyun	select DM_I2C
30*4882a593Smuzhiyun	select DM_KEYBOARD
31*4882a593Smuzhiyun	select DM_MMC
32*4882a593Smuzhiyun	select DM_PWM
33*4882a593Smuzhiyun	select DM_RESET
34*4882a593Smuzhiyun	select DM_SERIAL
35*4882a593Smuzhiyun	select DM_SPI
36*4882a593Smuzhiyun	select DM_SPI_FLASH
37*4882a593Smuzhiyun	select MISC
38*4882a593Smuzhiyun	select SPI
39*4882a593Smuzhiyun	select OF_CONTROL
40*4882a593Smuzhiyun	select VIDCONSOLE_AS_LCD if DM_VIDEO
41*4882a593Smuzhiyun	select BOARD_EARLY_INIT_F
42*4882a593Smuzhiyun	imply CRC32_VERIFY
43*4882a593Smuzhiyun
44*4882a593Smuzhiyunconfig TEGRA_NO_BPMP
45*4882a593Smuzhiyun	bool "Tegra common options for SoCs without BPMP"
46*4882a593Smuzhiyun	select TEGRA_CAR
47*4882a593Smuzhiyun	select TEGRA_CAR_CLOCK
48*4882a593Smuzhiyun	select TEGRA_CAR_RESET
49*4882a593Smuzhiyun
50*4882a593Smuzhiyunconfig TEGRA_ARMV7_COMMON
51*4882a593Smuzhiyun	bool "Tegra 32-bit common options"
52*4882a593Smuzhiyun	select CPU_V7
53*4882a593Smuzhiyun	select SPL
54*4882a593Smuzhiyun	select SPL_BOARD_INIT if SPL
55*4882a593Smuzhiyun	select SUPPORT_SPL
56*4882a593Smuzhiyun	select TEGRA_COMMON
57*4882a593Smuzhiyun	select TEGRA_GPIO
58*4882a593Smuzhiyun	select TEGRA_NO_BPMP
59*4882a593Smuzhiyun
60*4882a593Smuzhiyunconfig TEGRA_ARMV8_COMMON
61*4882a593Smuzhiyun	bool "Tegra 64-bit common options"
62*4882a593Smuzhiyun	select ARM64
63*4882a593Smuzhiyun	select TEGRA_COMMON
64*4882a593Smuzhiyun
65*4882a593Smuzhiyunchoice
66*4882a593Smuzhiyun	prompt "Tegra SoC select"
67*4882a593Smuzhiyun	optional
68*4882a593Smuzhiyun
69*4882a593Smuzhiyunconfig TEGRA20
70*4882a593Smuzhiyun	bool "Tegra20 family"
71*4882a593Smuzhiyun	select ARM_ERRATA_716044
72*4882a593Smuzhiyun	select ARM_ERRATA_742230
73*4882a593Smuzhiyun	select ARM_ERRATA_751472
74*4882a593Smuzhiyun	select TEGRA_ARMV7_COMMON
75*4882a593Smuzhiyun
76*4882a593Smuzhiyunconfig TEGRA30
77*4882a593Smuzhiyun	bool "Tegra30 family"
78*4882a593Smuzhiyun	select ARM_ERRATA_743622
79*4882a593Smuzhiyun	select ARM_ERRATA_751472
80*4882a593Smuzhiyun	select TEGRA_ARMV7_COMMON
81*4882a593Smuzhiyun
82*4882a593Smuzhiyunconfig TEGRA114
83*4882a593Smuzhiyun	bool "Tegra114 family"
84*4882a593Smuzhiyun	select TEGRA_ARMV7_COMMON
85*4882a593Smuzhiyun
86*4882a593Smuzhiyunconfig TEGRA124
87*4882a593Smuzhiyun	bool "Tegra124 family"
88*4882a593Smuzhiyun	select TEGRA_ARMV7_COMMON
89*4882a593Smuzhiyun	imply REGMAP
90*4882a593Smuzhiyun	imply SYSCON
91*4882a593Smuzhiyun
92*4882a593Smuzhiyunconfig TEGRA210
93*4882a593Smuzhiyun	bool "Tegra210 family"
94*4882a593Smuzhiyun	select TEGRA_GPIO
95*4882a593Smuzhiyun	select TEGRA_ARMV8_COMMON
96*4882a593Smuzhiyun	select TEGRA_NO_BPMP
97*4882a593Smuzhiyun
98*4882a593Smuzhiyunconfig TEGRA186
99*4882a593Smuzhiyun	bool "Tegra186 family"
100*4882a593Smuzhiyun	select DM_MAILBOX
101*4882a593Smuzhiyun	select TEGRA186_BPMP
102*4882a593Smuzhiyun	select TEGRA186_CLOCK
103*4882a593Smuzhiyun	select TEGRA186_GPIO
104*4882a593Smuzhiyun	select TEGRA186_RESET
105*4882a593Smuzhiyun	select TEGRA_ARMV8_COMMON
106*4882a593Smuzhiyun	select TEGRA_HSP
107*4882a593Smuzhiyun	select TEGRA_IVC
108*4882a593Smuzhiyun
109*4882a593Smuzhiyunendchoice
110*4882a593Smuzhiyun
111*4882a593Smuzhiyunconfig TEGRA_DISCONNECT_UDC_ON_BOOT
112*4882a593Smuzhiyun	bool "Disconnect USB device mode controller on boot"
113*4882a593Smuzhiyun	default y
114*4882a593Smuzhiyun	help
115*4882a593Smuzhiyun	  When loading U-Boot into RAM over USB protocols using tools such as
116*4882a593Smuzhiyun	  tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
117*4882a593Smuzhiyun	  mode controller is initialized and enumerated by the host PC running
118*4882a593Smuzhiyun	  the tool. Unfortunately, these tools do not shut down the USB
119*4882a593Smuzhiyun	  controller before executing the downloaded code, and so the host PC
120*4882a593Smuzhiyun	  does not "de-enumerate" the USB device. This option shuts down the
121*4882a593Smuzhiyun	  USB controller when U-Boot boots to avoid leaving a stale USB device
122*4882a593Smuzhiyun	  present.
123*4882a593Smuzhiyun
124*4882a593Smuzhiyunconfig SYS_MALLOC_F_LEN
125*4882a593Smuzhiyun	default 0x1800
126*4882a593Smuzhiyun
127*4882a593Smuzhiyunsource "arch/arm/mach-tegra/tegra20/Kconfig"
128*4882a593Smuzhiyunsource "arch/arm/mach-tegra/tegra30/Kconfig"
129*4882a593Smuzhiyunsource "arch/arm/mach-tegra/tegra114/Kconfig"
130*4882a593Smuzhiyunsource "arch/arm/mach-tegra/tegra124/Kconfig"
131*4882a593Smuzhiyunsource "arch/arm/mach-tegra/tegra210/Kconfig"
132*4882a593Smuzhiyunsource "arch/arm/mach-tegra/tegra186/Kconfig"
133*4882a593Smuzhiyun
134*4882a593Smuzhiyunconfig CMD_ENTERRCM
135*4882a593Smuzhiyun	bool "Enable 'enterrcm' command"
136*4882a593Smuzhiyun	default y
137*4882a593Smuzhiyun	help
138*4882a593Smuzhiyun	  Tegra's boot ROM supports a mode whereby code may be downloaded and
139*4882a593Smuzhiyun	  flash-programmed over a USB connection. On dev boards, this is
140*4882a593Smuzhiyun	  typically entered by holding down a "force recovery" button and
141*4882a593Smuzhiyun	  resetting the CPU. However, not all boards have such a button (one
142*4882a593Smuzhiyun	  example is the Compulab Trimslice), so a method to enter RCM from
143*4882a593Smuzhiyun	  software is useful.
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun	  Even on boards other than Trimslice, controlling this over a UART
146*4882a593Smuzhiyun	  may be useful, e.g. to allow simple remote control without the need
147*4882a593Smuzhiyun	  for mechanical button actuators, or hooking up relays/... to the
148*4882a593Smuzhiyun	  button.
149*4882a593Smuzhiyun
150*4882a593Smuzhiyunendif
151