1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Sunxi A31 Power Management Unit 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> 5*4882a593Smuzhiyun * http://linux-sunxi.org 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Based on sun6i sources and earlier U-Boot Allwinner A10 SPL work 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * (C) Copyright 2006-2013 10*4882a593Smuzhiyun * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 11*4882a593Smuzhiyun * Berg Xing <bergxing@allwinnertech.com> 12*4882a593Smuzhiyun * Tom Cubie <tangliang@allwinnertech.com> 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #include <common.h> 18*4882a593Smuzhiyun #include <errno.h> 19*4882a593Smuzhiyun #include <asm/io.h> 20*4882a593Smuzhiyun #include <asm/arch/cpu.h> 21*4882a593Smuzhiyun #include <asm/arch/prcm.h> 22*4882a593Smuzhiyun #include <asm/arch/sys_proto.h> 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* APB0 clock gate and reset bit offsets are the same. */ prcm_apb0_enable(u32 flags)25*4882a593Smuzhiyunvoid prcm_apb0_enable(u32 flags) 26*4882a593Smuzhiyun { 27*4882a593Smuzhiyun struct sunxi_prcm_reg *prcm = 28*4882a593Smuzhiyun (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* open the clock for module */ 31*4882a593Smuzhiyun setbits_le32(&prcm->apb0_gate, flags); 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* deassert reset for module */ 34*4882a593Smuzhiyun setbits_le32(&prcm->apb0_reset, flags); 35*4882a593Smuzhiyun } 36*4882a593Smuzhiyun prcm_apb0_disable(u32 flags)37*4882a593Smuzhiyunvoid prcm_apb0_disable(u32 flags) 38*4882a593Smuzhiyun { 39*4882a593Smuzhiyun struct sunxi_prcm_reg *prcm = 40*4882a593Smuzhiyun (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* assert reset for module */ 43*4882a593Smuzhiyun clrbits_le32(&prcm->apb0_reset, flags); 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* close the clock for module */ 46*4882a593Smuzhiyun clrbits_le32(&prcm->apb0_gate, flags); 47*4882a593Smuzhiyun } 48