1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2016 3*4882a593Smuzhiyun * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <common.h> 9*4882a593Smuzhiyun #include <asm/io.h> 10*4882a593Smuzhiyun #include <asm/arch/stm32.h> 11*4882a593Smuzhiyun #include <asm/arch/stm32_defs.h> 12*4882a593Smuzhiyun #include <asm/arch/gpt.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define READ_TIMER() (readl(&gpt1_regs_ptr->cnt) & GPT_FREE_RUNNING) 15*4882a593Smuzhiyun #define GPT_RESOLUTION (CONFIG_SYS_HZ_CLOCK/CONFIG_STM32_HZ) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define timestamp gd->arch.tbl 20*4882a593Smuzhiyun #define lastdec gd->arch.lastinc 21*4882a593Smuzhiyun timer_init(void)22*4882a593Smuzhiyunint timer_init(void) 23*4882a593Smuzhiyun { 24*4882a593Smuzhiyun /* Timer2 clock configuration */ 25*4882a593Smuzhiyun clock_setup(TIMER2_CLOCK_CFG); 26*4882a593Smuzhiyun /* Stop the timer */ 27*4882a593Smuzhiyun writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1); 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun writel((CONFIG_SYS_CLK_FREQ/CONFIG_SYS_HZ_CLOCK) - 1, 30*4882a593Smuzhiyun &gpt1_regs_ptr->psc); 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* Configure timer for auto-reload */ 33*4882a593Smuzhiyun writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD, 34*4882a593Smuzhiyun &gpt1_regs_ptr->cr1); 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun /* load value for free running */ 37*4882a593Smuzhiyun writel(GPT_FREE_RUNNING, &gpt1_regs_ptr->arr); 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* start timer */ 40*4882a593Smuzhiyun writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN, &gpt1_regs_ptr->cr1); 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun writel(readl(&gpt1_regs_ptr->egr) | TIM_EGR_UG, &gpt1_regs_ptr->egr); 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* Reset the timer */ 45*4882a593Smuzhiyun lastdec = READ_TIMER(); 46*4882a593Smuzhiyun timestamp = 0; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun return 0; 49*4882a593Smuzhiyun } 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* 52*4882a593Smuzhiyun * timer without interrupts 53*4882a593Smuzhiyun */ get_timer(ulong base)54*4882a593Smuzhiyunulong get_timer(ulong base) 55*4882a593Smuzhiyun { 56*4882a593Smuzhiyun return (get_timer_masked() / GPT_RESOLUTION) - base; 57*4882a593Smuzhiyun } 58*4882a593Smuzhiyun __udelay(unsigned long usec)59*4882a593Smuzhiyunvoid __udelay(unsigned long usec) 60*4882a593Smuzhiyun { 61*4882a593Smuzhiyun ulong tmo; 62*4882a593Smuzhiyun ulong start = get_timer_masked(); 63*4882a593Smuzhiyun ulong tenudelcnt = CONFIG_SYS_HZ_CLOCK / (1000 * 100); 64*4882a593Smuzhiyun ulong rndoff; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun rndoff = (usec % 10) ? 1 : 0; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* tenudelcnt timer tick gives 10 microsecconds delay */ 69*4882a593Smuzhiyun tmo = ((usec / 10) + rndoff) * tenudelcnt; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun while ((ulong) (get_timer_masked() - start) < tmo) 72*4882a593Smuzhiyun ; 73*4882a593Smuzhiyun } 74*4882a593Smuzhiyun get_timer_masked(void)75*4882a593Smuzhiyunulong get_timer_masked(void) 76*4882a593Smuzhiyun { 77*4882a593Smuzhiyun ulong now = READ_TIMER(); 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun if (now >= lastdec) { 80*4882a593Smuzhiyun /* normal mode */ 81*4882a593Smuzhiyun timestamp += now - lastdec; 82*4882a593Smuzhiyun } else { 83*4882a593Smuzhiyun /* we have an overflow ... */ 84*4882a593Smuzhiyun timestamp += now + GPT_FREE_RUNNING - lastdec; 85*4882a593Smuzhiyun } 86*4882a593Smuzhiyun lastdec = now; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun return timestamp; 89*4882a593Smuzhiyun } 90*4882a593Smuzhiyun udelay_masked(unsigned long usec)91*4882a593Smuzhiyunvoid udelay_masked(unsigned long usec) 92*4882a593Smuzhiyun { 93*4882a593Smuzhiyun return udelay(usec); 94*4882a593Smuzhiyun } 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun /* 97*4882a593Smuzhiyun * This function is derived from PowerPC code (read timebase as long long). 98*4882a593Smuzhiyun * On ARM it just returns the timer value. 99*4882a593Smuzhiyun */ get_ticks(void)100*4882a593Smuzhiyununsigned long long get_ticks(void) 101*4882a593Smuzhiyun { 102*4882a593Smuzhiyun return get_timer(0); 103*4882a593Smuzhiyun } 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* 106*4882a593Smuzhiyun * This function is derived from PowerPC code (timebase clock frequency). 107*4882a593Smuzhiyun * On ARM it returns the number of timer ticks per second. 108*4882a593Smuzhiyun */ get_tbclk(void)109*4882a593Smuzhiyunulong get_tbclk(void) 110*4882a593Smuzhiyun { 111*4882a593Smuzhiyun return CONFIG_STM32_HZ; 112*4882a593Smuzhiyun } 113